feature

high speed:
tpd = 7ns (typ.) at vcc =6v
low power dissipation:
icc = 1ma(max.) at ta=25°c
high noise immunity:
vnih = vnil = 28 % vcc (min.)
symmetrical output impedance:
|ioh| = iol = 4ma (min)
balanced propagation delays:
tplh @ tphl
wide operating voltage range:
vcc (opr) = 2v to 6v
pin and function compatible with
74 series 08
description
the m74hc08 is an high speed cmos quad
2-input and gate fabricated with silicon gate
c2mos technology.
the internal circuit is composed of 2 stages
including buffer output, which enables high noise
immunity and stable output.