pad no.

pd name

i/o

function

1

csb

i

chip selection input with pull-high resistor

when the csb is logic high, the data and command read from or written to the h1621 are disabled. the serial interface circuit is also reset. but if csb is at logic low level and is input to the csb pad, the data and command transmission between the host controller and the h1621 are all enabled.

2

rdb

i

read clock input with pull-high resistor

data in the ram of the h1621 are clocked out on the falling edge of the rdb signal. the clocked out data will appear on the data line. the host controller can use the next rising edge to latch the clocked out data.

3

wpb

i

write clock input with pull-high resistor

data on the date line are latched into the h1621 on the rising edge of the wpb signal.

4

data

i/o

serial date input/output with pull-high resistor

5

vss

—

negative power supply, ground

7

osci

i

the osci and osco pads are connected to a 32.768khz crystal in order to generate a system clock. if the system clock comes from an external clock source, the external clock source should be connected to the osci pad. but if an on-chip rc oscillator is selected instead, the osci and osco pads can be left open.

6

osco

o

8

vlcd

i

lcd power input

9

vdd

—

positive power supply

10

irqb

o

time base or wdt overflow flag, nmos open drain output

11,12

bz, bzb

o

2khz or 4khz tone frequency output pair

13~16

com0~com3

o

lcd common outputs

48~17

seg0~seg31

o

lcd segment outputs