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參數(shù)資料
| 型號： | AD8314-EVAL |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 100 MHz-2500 MHz 45 dB RF Detector/Controller |
| 中文描述： | 100兆赫，2500兆赫45分貝射頻檢測器/控制器 |
| 文件頁數(shù)： | 13/16頁 |
| 文件大小： | 274K |
| 代理商： | AD8314-EVAL |
AD8314
–13–
REV. 0
The setpoint voltage, in the range 0 V to 1.1 V, is applied to the
VSET pin of the AD8314. This will typically be supplied by a
Digital-to-Analog Converter (DAC). This voltage is compared
to the input level to the AD8314. Any imbalance is between VSET
and the RF input level is corrected by V_DN, which drives the
V
APC
(gain control) of the power amplifier. V_DN reaches a
maximum value of approximately 1.9 V on a 2.7 V supply (this
will be higher for higher supply voltages) while delivering approxi-
mately 3 mA to the V
APC
input.
A filter capacitor (C
F
) must be used to stabilize the loop. The
choice of C
F
will depend to a large degree on the gain control
dynamics of the power amplifier, something that is frequently
poorly characterized, so some trial and error may be necessary.
In this example, a 220 pF capacitor gives the loop sufficient
speed to follow the GSM and DCS1800 time slot ramping profiles,
while still having a stable, critically-damped response.
Figure 35 shows the relationship between the setpoint voltage,
V
SET
and output power, at 0.9 GHz. The overall gain control
function is linear in dB for a dynamic range of over 40 dB.
Figure 36 shows a similar circuit for a single band handset power
amplifier. The BGY241 (Phillips) is driven by a nominal power
level of 0 dBm. A 20 dB directional coupler, DC09-73 (Alpha) is
used to couple the signal in this case. Figure 37 shows the rela-
tionship between the control voltage and the output power at
0.9 GHz.
In both of these examples, noise on the V_DN pin can be reduced
by placing a simple RC low-pass filter between V
DN
and the gain
control pin of the power amplifier. However, the value of the
resistor should be kept low to minimize the voltage drop across
it due to the dc current flowing into the gain control input.
VSET – Volts
–30
0
P
0.2
0.4
0.6
0.8
1.0
1.2
–20
–10
0
10
20
30
40
Figure 35. POUT vs. VSET at 0.9 GHz for Dual Mode
Handset Power Amplifier Application
ENBL
RFIN
AD8314
VSET
FLTR
VPOS
COMM
V UP
V
2.7V
V
0V–1.1V
RF INPUT
0dBm
MAX
V
S
ATTN
15dB
V DN
C
220pF
+35dBm
MAX
47
m
F
TO
ANTENNA
BGY241
+15dBm
2.2
m
F
680pF
P
0dBm
DC09-73
6
3
4
5
1
2
3.5V
0.1
m
F
52.3
V
Figure 36. A Single Mode Power Amplifier Control Circuit
VSET – Volts
–30
0
P
0.2
0.4
0.6
0.8
1.0
–20
–10
0
10
20
30
40
–40
–50
Figure 37. POUT vs. VSET at 0.9 GHz for Single Mode
Handset
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD8316 | Dual Output GSM PA Controller |
| AD8316-EVAL | Dual Output GSM PA Controller |
| AD8316ACP-EVAL | Dual Output GSM PA Controller |
| AD8316ACP-REEL | Dual Output GSM PA Controller |
| AD8316ACP-REEL7 | Dual Output GSM PA Controller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD8315 | 制造商:AD 制造商全稱:Analog Devices 功能描述:50 dB GSM PA Controller |
| AD8315_06 | 制造商:AD 制造商全稱:Analog Devices 功能描述:50 dB GSM PA Controller |
| AD8315ACHIPS | 制造商:AD 制造商全稱:Analog Devices 功能描述:50 dB GSM PA Controller |
| AD8315ACP-EVAL | 制造商:Analog Devices 功能描述:EVAL BOARD GSM PA CONTR AD8 |
| AD8315ACP-REEL | 制造商:Analog Devices 功能描述: |
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