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參數資料
| 型號： | AD9736-EB |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 14/12/10-Bit, 1200 MSPS D/A Converters |
| 中文描述： | 14/12/10-Bit，1200 MSPS的D / A轉換 |
| 文件頁數： | 21/42頁 |
| 文件大小： | 934K |
| 代理商： | AD9736-EB |
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Preliminary Technical Data
AD9736/AD9735/AD9734
configurations or initiating a software reset is highly
recommended. In the event of unexpected programming sequences
the AD9736 SPI may become inaccessible. For example, if user
code inadvertently changes the LONG_INS bit or LSBFIRST bit the
following bits may have unexpected results. The SPI can be
returned to a known state by writing an incomplete byte (1-7 bits)
of all zeroes followed by three bytes of 0x00. This will return to
MSB first short instructions (REG00 = 0x00) so the device may be
reinitialized.
Rev. PrJ | Page 21 of 42
R/W N0
N1
A0 A1
A2
A3 A4
D7 D6
N
D5
N
D0
0
D1
0
D2
0
D3
0
D7D6
N
D5
N
D0
0
D1
0
D2
0
D3
0
INSTRUCTION CYCLE
DATA TRANSFER CYCLE
CSB
SCLK
SDIO
SDO
Figure 19. Serial Register Interface Timing MSB First
INSTRUCTION CYCLE
DATA TRANSFER CYCLE
CSB
SCLK
SDIO
SDO
A0
A1
A2
A3
A4
N1
N0 R/W D0D1
0
D2
0
D7
N
D6
N
D5
N
D4
N
D0D1
0
D2
0
D7
N
D6
N
D5
N
D4
N
Figure 20. Serial Register Interface Timing LSB First
INSTRUCTION BIT 6
INSTRUCTION BIT 7
CSB
SCLK
SDIO
t
DS
t
DS
t
DH
t
PWH
t
PWL
t
SCLK
0
Figure 21. Timing Diagram for SPI Register Write
I1
I0
D7
D6
D5
t
DV
t
DNV
CSB
SCLK
SDIO
Figure 22. Timing Diagram for SPI Register Read
After the last instruction bit is written to the SDIO pin the driving
signal must be set to a high impedance in time for the bus to turn
around. The serial output data from the AD9736 will be enabled by
the falling edge of SCLK. This causes the first output data bit to be
shorter than the remaining data bits as shown in Figure 22.
PIN MODE OPERATION
When the PIN_MODE input (pin L1) is set high, the SPI port is
disabled. The SPI port pins are remapped as shown in Table 10. The
function of these pins is described in Table 11. The remaining
PIN_MODE register settings are shown in Table 5, the SPI register
map.
Pin Number
E13
F13
G13
E14
F14
G14
PIN_MODE = 0
IRQ
CSB
SCLK
RESET
SDIO
SDO
PIN_MODE = 1
UNSIGNED
2X
FSC0
PD
FIFO
FSC1
Table 10. SPI_MODE vs. PIN_MODE Inputs
Pin
Function
0, Two’s complement input data format
1, Unsigned input data format
0, Interpolation disabled
1, Interpolation = 2x enabled
00, Sleep mode
01, 10mA full scale output current
10, 20mA full scale output current
11, 30mA full scale output current
0, Chip enabled
1, Chip in power down state
0, Input FIFO disabled
1, Input FIFO enabled
UNSIGNED
2X
FSC1, FSC0
PD
FIFO
Table 11. PIN_MODE Input Functions
Care must be taken when using PIN_MODE since only the control
bits shown in Table 11 can be changed. If the remaining register
default values are not suitable for the desired operation
PIN_MODE cannot be used.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| AD9736-EBZ | 制造商:Analog Devices 功能描述:EVAL BD FOR AD9735 DAC, 10-/12-/14BIT, 1200 MSPS DACS - Bulk |
| AD9736XBC | 制造商:Analog Devices 功能描述:14-BIT 1600 MSPS D/A CONVERTER - Bulk |
| AD9737A | 制造商:AD 制造商全稱:Analog Devices 功能描述:11-/14-Bit, 2.5 GSPS |
| AD9737ABBCZ | 功能描述:IC DAC 11BIT 2.5GSPS RF 160BGA RoHS:是 類別:集成電路 (IC) >> 數據采集 - 數模轉換器 系列:- 標準包裝:1 系列:- 設置時間:4.5µs 位數:12 數據接口:串行，SPI? 轉換器數目:1 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應商設備封裝:8-SOICN 包裝:剪切帶 (CT) 輸出數目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:* 其它名稱:MCP4921T-E/SNCTMCP4921T-E/SNRCTMCP4921T-E/SNRCT-ND |
| AD9737ABBCZRL | 功能描述:數模轉換器- DAC 11-Bit 2.5 GSPS RF RoHS:否 制造商:Analog Devices 轉換器數量:4 DAC 輸出端數量:4 轉換速率: 分辨率:12 bit 接口類型:Serial (I2C) 穩定時間: 最大工作溫度:+ 105 C 安裝風格: 封裝 / 箱體:TSSOP 封裝:Reel |
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