- 您現在的位置：買賣IC網 > PDF目錄373972 > AD9958BCPZ (ANALOG DEVICES INC) 2-Channel 500 MSPS DDS with 10-Bit DACs PDF資料下載
參數資料
| 型號： | AD9958BCPZ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 模擬信號調理 |
| 英文描述： | 2-Channel 500 MSPS DDS with 10-Bit DACs |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, QCC56 |
| 封裝： | 8 X 8 MM, LEAD FREE, MO-220-VLLD-2, LFCSP-56 |
| 文件頁數： | 28/40頁 |
| 文件大?。?/td> | 1051K |
| 代理商： | AD9958BCPZ |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁當前第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁
AD9958
I/O_UPDATE, SYNC_CLK, AND SYSTEM CLOCK
RELATIONSHIPS
I/O_UPDATE and SYNC_CLK are used together to transfer
data from the serial I/O buffer to the active registers in the
device. Data in the buffer is inactive.
Rev. 0 | Page 28 of 40
The I/O UPDATE is essentially over sampled by the
SYNC_CLK. Therefore, I/O_UPDATE must have a
minimum pulse width greater than one SYNC_CLK period.
The timing diagram shown in Figure 39 depicts when data in
the buffer is transferred to the active registers.
SYNC_CLK is a rising edge active signal. It is derived from
the system clock and a divide-by-4 frequency divider. The
SYNC_CLK is externally provided, which can be used to
synchronize external hardware to the AD9958’s internal clocks.
I/O_UPDATE initiates the start of a buffer transfer. It can be
sent synchronously or asynchronous relative to the SYNC_CLK.
If the set-up time between these signals is met, then constant
latency (pipeline) to the DAC output exists. For example, if
repetitive changes to phase offset via the SPI port are desired,
the latency of those changes to the DAC output is constant,
otherwise a time uncertainty of 1 SYNC_CLK period is present.
SYNC_CLK
SYSCLK
A
B
DATA 2
DATA 3
DATA 1
DATA IN
REGISTERS
DATA IN
I/O BUFFERS
DATA 1
DATA 2
DATA 3
I/O UPDATE
THE DEVICE REGISTERS AN I/O UPDATE AT POINT A. THE DATA IS TRANSFERRED FROM THE ASYNCHRONOUSLY LOADED I/O BUFFERS AT POINT B.
0
Figure 39.
相關PDF資料 |
PDF描述 |
|---|---|
| AD9970 | 14-Bit CCD Signal Processor with Precision Timing Generator |
| AD9971 | 12-Bit CCD Signal Processor with Precision Timing |
| AD9973 | Dual-Channel, 14-Bit CCD Signal Processor with Precision Timing⑩ Core |
| AD9974 | Dual-Channel, 14-Bit, CCD Signal Processor with Precision Timing⑩ Core |
| AD9975ABSTRL | Broadband Modem Mixed-Signal Front End |
相關代理商/技術參數 |
參數描述 |
|---|---|
| AD9958BCPZ-REEL7 | 功能描述:IC DDS DUAL 10BIT DAC 56LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 直接數字合成 (DDS) 系列:- 產品變化通告:Product Discontinuance 27/Oct/2011 標準包裝:2,500 系列:- 分辨率（位）:10 b 主 fclk:25MHz 調節字寬（位）:32 b 電源電壓:2.97 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:16-TSSOP 包裝:帶卷 (TR) |
| AD9959 | 制造商:AD 制造商全稱:Analog Devices 功能描述:4 Channel 500MSPS DDS with 10-bit DACs |
| AD9959/PCBZ | 功能描述:BOARD EVALUATION FOR AD9959 RoHS:是 類別:編程器，開發系統 >> 評估演示板和套件 系列:- 標準包裝:1 系列:PSoC® 主要目的:電源管理，熱管理 嵌入式:- 已用 IC / 零件:- 主要屬性:- 次要屬性:- 已供物品:板，CD，電源 |
| AD9959/PCBZ | 制造商:Analog Devices 功能描述:AD9959, DDS, DAC, GUI, USB, EVALUATION B |
| AD9959/PCBZ1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:4-Channel, 500 MSPS DDS with 10-Bit DACs |
發布緊急采購，3分鐘左右您將得到回復。