
Digital Interface
2-5
Analog and Digital Interface
2.2
Digital Interface
The biggest problem in mixed signal circuits is the noise injected from the
digital devices to the analog. To reduce noise injection, the digital I/O to the
DEM-ADS7864 is buffered. Placing the buffers near the ADS7864 and
keeping the lines as short as possible minimizes the digital noise.
2.2.1
Control Signals
The RESET and chip select (CS) signals are connected through U12, an
SN74HC244. In this way, the system reset will take immediate action on the
ADS7864. The gating signal of the latch is permanently connected to ground.
The CS and BYTE inputs have pull-up resistors, to prevent the ADS7864 from
operating without control signals.
2.2.2
Bus Width
The DEM-ADS7864 board defaults the ADC output data to 8-bit mode. The
lower 8-bits [DB7
–
DB0] are accessed via U12 on the first RD signal, while the
upper 8-bits are accessed on the second RD signal. U12 is defaulted to the
active state through pull-down resistor R20.
Full 16-bit access requires the user to pull both the gate of 8-bit buffer U10 and
the BYTE signal low. The gate control for U10 is provided through hex inverter
U14, defaulting the buffer to its high-impedance state through pulldown
resistor R10. This requires the user to assert a logic high on P1 pin 20, and
logic low on P1 pin 7.
The CIB board connects to the user
’
s host computer through a 25-pin
connector on the parallel port. Communication with the CIB board is through
an 8-bit bus.
2.2.3
External Clock and Trigger
Operating at 56MHz, the CIB board provides a clock frequency of 7 MHz to the
DEM-ADS7864 board. To test the device at some other frequency, provision
is made to supply an external clock.
NOTE
–
The maximum frequency of the
ADS7864 is 8MHz
.
The external clock is applied to inverting Schmitt trigger
74HC14 through P2. The clock is then routed into the DEM
–
CIB, which uses
a multiplexer to send the signal back to the DEM
–
ADS7864. A state machine
on the CIB controls CS, HOLDx, RD, A0, A1 and A2 based on either the
internal or external clock source. The user must configure the BBEval software
to facilitate the use of the external clock. Review the software documentation
for details on using an external clock source.
If the evaluation requires a specific instant to be captured, an external trigger
input applied to the BNC connector at location P3 can start the A/D converter
capturing an event. This feature is also controlled by the BBEval software.
Please review the software documentation for details of the external trigger
operation.