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參數資料
| 型號： | EDI2GG46464V12D |
| 英文描述： | 4x64Kx64, 3.3V Synchronous Flow-Through SRAM Card Module(4x64Kx64, 3.3V，12ns,同步靜態RAM卡模塊(流通結構）) |
| 中文描述： | 4x64Kx64，3.3V的同步流通過的SRAM卡模塊（4x64Kx64，3.3伏，12ns，同步靜態內存卡模塊（流通結構）） |
| 文件頁數： | 1/8頁 |
| 文件大小： | 244K |
| 代理商： | EDI2GG46464V12D |
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White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com
EDI2GG46464V
February 1999 Rev. 2
ECO# 10858
4x64Kx64, 3.3V Synchronous SRAM CARD EDGE DIMM
FEATURES
s 4x64Kx64 Synchronous
s Access Speed(s): TKHQV = 9.5, 10, 11,12, 15ns
s Flow-Through Architecture
s Clock Controlled Registered Bank Enables (E1\,E2\, E3\, E4\)
s Clock Controlled Registered Address
s Clock Controlled Registered Global Write (GW\)
s Aysnchronous Output Enable (G\)
s Internally self-timed Write+
s Gold Lead Finish
s 3.3V
±10%, -5% Operation
s Common Data I/O
s High Capacitance (30pF) drive, at rated Access Speed
s Single total array Clock
s Multiple Vcc and Vss
The EDI2GG46464VxxD is a Synchronous SRAM, 60 position
Dual Key; Card Edge DIMM (120 contacts) Module, organized as
4x64Kx64. The Module contains eight (8) Synchronous Burst
Ram Devices, packaged in the industry standard JEDEC 14mmx20mm
TQFP placed on a Multilayer FR4 Substrate. The module architecture
is defined as a Synchronous Only, Flow-Through, Early Write
device. This Module provides high performance, ultra fast access
times at a cost per bit benefit over BiCMOS Asynchronous devices.
As well as improved cost per bit, the use of Synchronous or
Synchronous burst devices or modules can ease the memory
subsystem design by reducing or easing the memory controller
requirement.
Synchronous operations are in relation to an externally supplied
clock, registered address, registered global write, registered enables
as well as an Asynchronous Output enable. All Read and Write
operations are performed in Quad Words (64 bit operations).
Write cycles are internally self timed and are initiated by a rising
clock edge. This feature relieves the designer the task of developing
external pulse width circuitry.
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