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參數資料
| 型號： | FAN5632MPX |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 穩壓器 |
| 英文描述： | Regulated Step-Down Charge Pump DC/DC Converter |
| 中文描述： | 0.5 A SWITCHED CAPACITOR REGULATOR, 1700 kHz SWITCHING FREQ-MAX, PDSO10 |
| 封裝： | 3X3 MM, MLP-10 |
| 文件頁數： | 2/11頁 |
| 文件大小： | 569K |
| 代理商： | FAN5632MPX |
2
www.fairchildsemi.com
FAN5631/FAN5632 Rev. 1.0.0
F
Typical Application
Pin Assignment
Figure 3. Pin Assignment
Pin Description
Pin No.
Pin Name
Pin Description
1
V
SEL
Output Voltage Select Logic Input Pin.
connected to either a logic high or logic low level.
FAN5631:
If a logic low is applied to the V
applied then V
OUT
is 1.5V.
FAN5632:
If a logic low is applied to the V
and the output voltage accuracy is relaxed in order to meet optimum efficiency. However, if a
logic high is applied, the device will operate like a typical charge pump converter.
The V
SEL
pin can not be left floating and must be
SEL
pin then V
OUT
is 1.2V. If a logic high is
SEL
pin, the efficiency optimization mode is enabled,
2
EN
Enable Input Pin.
logic low is applied, the device is disabled and the supply current is reduced to less than 1μA.
The EN pin can not be left floating and must be connected to either a logic high or logic low level.
If a logic high is applied to the EN pin, the device is enabled. However, if a
3
C
B
+
Bucket Capacitor Positive Pin.
4
GND
Ground Pin.
connected to GND.
This pin is connected to the internal MOSFET switches. This pin must be externally
5
C
B
-
Bucket Capacitor Negative Pin.
6
V
OUT
NC
Output Voltage Pin.
7
Not Connected.
This pin is not internally connected.
8
NC
Not Connected.
This pin is not internally connected.
9
V
IN
Supply Voltage Input.
10
NC
Not Connected.
This pin is not internally connected.
V
SEL
EN
V
OUT
= 1.2V to 1.5V
I
OUT_MAX
= 250mA
V
IN
= 2.7V to 5.5V
C
OUT
10
F
C
IN
10
μ
F
NC
NC
NC
C
B
+
C
B
-
GND
10
9
6
7
8
1
2
3
4
5
ON
OFF
40
50
60
70
80
90
FAN5631
FAN5632 with
optimization
1:1 Mode
2:1 Mode
Average Efficiency (over V
IN
= 2.7V to 5V) = 66%, With optimization = 77%
Average Efficiency (over V
IN
= 2.7V to 4.2V) = 67%, With optimization = 84%
2
2
E
3
3
3
4
4
4
4
5
Input Voltage (V)
V
IN
NC
NC
V
OUT
NC
C
B
+
GND
C
B
-
V
SEL
EN
10
9
6
7
8
1
2
3
4
5
3x3mm 10-Lead MLP
Top View
Figure 2. Typical Efficiency Graph
Figure 1. Typical Application
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