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參數資料
| 型號： | FDS2170N3 |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | JFETs |
| 英文描述： | 200V N-Channel PowerTrench剖 MOSFET |
| 中文描述： | 0.128 ohm, Si, POWER, FET |
| 封裝： | FLMP, SO-8 |
| 文件頁數： | 2/6頁 |
| 文件大小： | 201K |
| 代理商： | FDS2170N3 |
FDS2170N3 Rev B1(W)
Electrical Characteristics
T
A
= 25°C unless otherwise noted
Test Conditions
Symbol
Parameter
Min
Typ
Max Units
Drain-Source Avalanche Ratings
(Note 2)
W
DSS
Drain-Source Avalanche Energy
I
AR
Drain-Source Avalanche Current
Single Pulse, V
DD
= 100 V, I
D
=3.0 A
370
3
mJ
A
Off Characteristics
BV
DSS
Drain–Source Breakdown Voltage
BV
DSS
T
J
Coefficient
I
DSS
Zero Gate Voltage Drain Current
I
GSSF
Gate–Body Leakage, Forward
I
GSSR
Gate–Body Leakage, Reverse
V
GS
= 0 V,
I
D
= 250
μ
A
200
V
Breakdown Voltage Temperature
I
D
= 250
μ
A, Referenced to 25
°
C
231
mV/
°
C
V
DS
= 160 V, V
GS
= 0 V
V
GS
= 20 V,
V
GS
= –20 V, V
DS
= 0 V
1
μ
A
nA
nA
V
DS
= 0 V
100
–100
On Characteristics
V
GS(th)
Gate Threshold Voltage
V
GS(th)
T
J
Temperature Coefficient
R
DS(on)
Static Drain–Source
On–Resistance
g
FS
Forward Transconductance
(Note 2)
V
DS
= V
GS
,
I
D
= 250
μ
A, Referenced to 25
°
C
V
GS
= 10 V,
I
D
= 3.0 A
V
GS
= 10 V, I
D
= 3.0 A,T
J
= 125
°
C
V
DS
= 10 V, I
D
= 3.0 A
I
D
= 250
μ
A
2
4
4.5
V
Gate Threshold Voltage
–10
mV/
°
C
108
214
15
128
268
m
S
Dynamic Characteristics
C
iss
Input Capacitance
C
oss
Output Capacitance
C
rss
Reverse Transfer Capacitance
R
G
Gate Resistance
1292
72
24
1.5
pF
pF
pF
V
DS
= 100 V, V
GS
= 0 V,
f = 1.0 MHz
V
GS
= 15 mV, f = 1.0 MHz
Switching Characteristics
(Note 2)
t
d(on)
Turn–On Delay Time
t
r
Turn–On Rise Time
t
d(off)
Turn–Off Delay Time
t
f
Turn–Off Fall Time
Q
g
Total Gate Charge
Q
gs
Gate–Source Charge
Q
gd
Gate–Drain Charge
12
5
30
23
26
7
10
22
10
48
36
36
ns
ns
ns
ns
nC
nC
nC
V
DD
= 100 V, I
D
= 1 A,
V
GS
= 10 V,
R
GEN
= 6
V
DS
= 100 V, I
D
= 3.0 A,
V
GS
= 10 V
Drain–Source Diode Characteristics and Maximum Ratings
I
S
Maximum Continuous Drain–Source Diode Forward Current
Drain–Source Diode Forward
Voltage
t
rr
Diode Reverse Recovery Time
Q
rr
Diode Reverse Recovery Charge
Notes:
1.
R
θ
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the
drain pins. R
θ
JC
is guaranteed by design while R
θ
CA
is determined by the user's board design.
2.5
A
V
SD
V
GS
= 0 V,
I
S
= 2.5 A
(Note 2)
0.76
1.2
V
95
552
nS
nC
I
F
= 3.0A
d
iF
/d
t
= 100 A/μs
(Note 2)
a)
40°C/W when
mounted on a 1in
2
pad
of 2 oz copper
b)
85°C/W when mounted on
a minimum pad of 2 oz
copper
Scale 1 : 1 on letter size paper
2.
Pulse Test: Pulse Width < 300
μ
s, Duty Cycle < 2.0%
F
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