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參數(shù)資料
| 型號： | FEDS82V48540-01 |
| 廠商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | 393,216-Word 】 32-Bit 】 4-Bank FIFO-SGRAM |
| 中文描述： | 393216詞】32位】4銀行先進先出，SGRAM |
| 文件頁數(shù)： | 7/44頁 |
| 文件大小： | 1419K |
| 代理商： | FEDS82V48540-01 |
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FEDS82V48540-01
OKI Semiconductor
Read with Auto Prechaege Command (
CS
,
CAS
= “Low”,
RAS
,
WE
, A10/AP = “High”)
The Read with Auto Precharge command is required to begin burst read operation with auto precharge after the
burst read. Any command that interrupts this operation cannot be issued.
No Operation Command (
CS
= “Low”,
RAS
,
CAS
,
WE
= “High”)
The No Operation command does not trigger any operation.
Device Deselect Command (
CS
= “High”)
The Device Deselect command disables the
RAS
,
CAS
,
WE
and Address input. This command does not trigger
any operation.
Data Write/Output Enable Command (DQMi = “Low”)
The Data Write/Output Enable command enables DQ0 - DQ31 in read or write.
The each DQM0, 1, 2 and 3 corresponds to DQ0 - DQ7, DQ8 - DQ15, DQ16 - DQ23 and DQ24 - DQ31
respectively.
Data Mask/Output Disable Command (DQMi = “High”)
The Data Mask/Output Disable command disables DQ0 - DQ31 in read or write. In read cycle output buffers are
disabled after 2 clocks . In write cycle input buffers are disabled at the same clock. The each DQM0, 1, 2 and 3
corresponds to DQ0 - DQ7, DQ8 - DQ15, DQ16 - DQ23 and DQ24 - DQ31
respectively.
Burst Stop Command (
CS
,
WE
= “Low”,
RAS
,
CAS
= “High”)
The Burst Stop command stops burst access. After the Burst Stop command is entered, the output buffer goes into
high impedance state.
MS82V48540
7/44
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