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參數資料
| 型號： | IDT74ALVCF162835APV8 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 總線收發器 |
| 英文描述： | ALVC/VCX/A SERIES, 18-BIT DRIVER, TRUE OUTPUT, PDSO56 |
| 封裝： | 0.635 MM PITCH, SSOP-56 |
| 文件頁數： | 1/6頁 |
| 文件大小： | 64K |
| 代理商： | IDT74ALVCF162835APV8 |
INDUSTRIALTEMPERATURERANGE
IDT74ALVCF162835A
3.3V CMOS 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS
1
MAY 1999
INDUSTRIAL TEMPERATURE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
1999 Integrated Device Technology, Inc.
DSC-4920/1
FEATURES:
0.5 MICRON CMOS Technology
Typical tSK(o) (Output Skew) < 250ps
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
VCC = 3.3V ± 0.3V, Normal Range
VCC = 2.7V to 3.6V, Extended Range
VCC = 2.5V ± 0.2V
CMOS power levels (0.4
W typ. static)
Rail-to-Rail output swing for increased noise margin
Available in SSOP, TSSOP, and TVSOP packages
FUNCTIONAL BLOCK DIAGRAM
DRIVE FEATURES:
Balanced Output Drivers: ±18mA
Low switching noise
APPLICATIONS:
SDRAM Modules
PC Motherboards
Workstations
IDT74ALVCF162835A
3.3V CMOS 18-BIT
UNIVERSAL BUS DRIVER
WITH 3-STATE OUTPUTS
DESCRIPTION:
This 18-bit universal bus driver is built using advanced dual metal CMOS
technology. Data flow from A to Y is controlled by the output-enable (OE)
input. The device operates in the transparent mode when the latch-enable
(LE) input is high. The A data is latched if the clock (CLK) input is held at
a high or low logic level. If LE is low, the A data is stored in the latch flip-flop
on the low-to-high transition of CLK. When OE is high, the outputs are in the
high-impedance state.
The ALVCF162835A has series resistors in the device output structure
which will reduce switching noise in 128MB and 256MB SDRAM modules.
Designed with a drive capability of ±18mA, the ALVCF162835A is a mid-
way drive between the ALVC162835 (±12mA) and ALVC16835 (±24mA).
The ALVCF162835A is a faster version of the ALVCF162835 or
ALVC162835. It is suitable for PC133 applications and particularly SDRAM
Modules clocked at 133 MHz.
LE
A1
TO 17 OTHER CHANNELS
OE
CLK
27
54
28
30
1
D
CLK
3
Y1
C1
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| IDT74ALVCF162835APV | ALVC/VCX/A SERIES, 18-BIT DRIVER, TRUE OUTPUT, PDSO56 |
| IDT74ALVCH162245PAG8 | ALVC/VCX/A SERIES, DUAL 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO48 |
| IDT74ALVCH162245PV8 | ALVC/VCX/A SERIES, DUAL 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO48 |
| IDT74ALVCH162268PF | ALVC/VCX/A SERIES, 12-BIT EXCHANGER, TRUE OUTPUT, PDSO56 |
| IDT74ALVCH162268PA8 | ALVC/VCX/A SERIES, 12-BIT EXCHANGER, TRUE OUTPUT, PDSO56 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| IDT74ALVCH162244PAG | 功能描述:IC BUFF DVR TRI-ST 16BIT 48TSSOP RoHS:是 類別:集成電路 (IC) >> 邏輯 - 緩沖器，驅動器，接收器，收發器 系列:74ALVCH 標準包裝:47 系列:74LVX 邏輯類型:緩沖器/線路驅動器，非反相 元件數:4 每個元件的位元數:1 輸出電流高，低:4mA，4mA 電源電壓:2 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:14-SOIC（0.209"，5.30mm 寬） 供應商設備封裝:14-SOIC 包裝:管件 |
| IDT74ALVCH162244PAG8 | 功能描述:IC BUFF DVR TRI-ST 16BIT 48TSSOP RoHS:是 類別:集成電路 (IC) >> 邏輯 - 緩沖器，驅動器，接收器，收發器 系列:74ALVCH 標準包裝:1 系列:74LVCR 邏輯類型:收發器，非反相 元件數:1 每個元件的位元數:8 輸出電流高，低:12mA，12mA 電源電壓:1.65 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:20-VFQFN 裸露焊盤 供應商設備封裝:20-VQFN-EP（3.5x4.5） 包裝:剪切帶 (CT) 產品目錄頁面:997 (CN2011-ZH PDF) 其它名稱:296-13981-1 |
| IDT74ALVCH162244PVG | 功能描述:IC BUFF DVR TRI-ST 16BIT 48SSOP RoHS:是 類別:集成電路 (IC) >> 邏輯 - 緩沖器，驅動器，接收器，收發器 系列:74ALVCH 標準包裝:47 系列:74LVX 邏輯類型:緩沖器/線路驅動器，非反相 元件數:4 每個元件的位元數:1 輸出電流高，低:4mA，4mA 電源電壓:2 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:14-SOIC（0.209"，5.30mm 寬） 供應商設備封裝:14-SOIC 包裝:管件 |
| IDT74ALVCH162244PVG8 | 功能描述:IC BUFF DVR TRI-ST 16BIT 48SSOP RoHS:是 類別:集成電路 (IC) >> 邏輯 - 緩沖器，驅動器，接收器，收發器 系列:74ALVCH 標準包裝:47 系列:74LVX 邏輯類型:緩沖器/線路驅動器，非反相 元件數:4 每個元件的位元數:1 輸出電流高，低:4mA，4mA 電源電壓:2 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:14-SOIC（0.209"，5.30mm 寬） 供應商設備封裝:14-SOIC 包裝:管件 |
| IDT74ALVCH162245PAG | 功能描述:IC TRANSCVR TRI-ST 16BIT 48TSSOP RoHS:是 類別:集成電路 (IC) >> 邏輯 - 緩沖器，驅動器，接收器，收發器 系列:74ALVCH 標準包裝:2,000 系列:74LVCH 邏輯類型:緩沖器/線路驅動器，非反相 元件數:2 每個元件的位元數:4 輸出電流高，低:24mA，24mA 電源電壓:1.65 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:20-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:20-SOIC 包裝:帶卷 (TR) |
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