
Timer Interface Module A (TIMA)
Functional description
MC68HC08AZ32
MOTOROLA
Timer Interface Module A (TIMA)
249
TIMA counter
prescaler
The TIMA clock source can be one of the seven prescaler outputs or the
TIMA clock pin, PTD6/TACLK. The prescaler generates seven clock
rates from the internal bus clock. The prescaler select bits, PS[2:0], in
the TIMA status and control register select the TIMA clock source.
Table 1. TIMA I/O register summary
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
Addr.
TIMA status/control register (TASC)
TOF
TOIE
TSTOP
TRST
0
PS2
PS1
PS0
$0020
TIMA counter register high (TACNTH)
Bit 15
14
13
12
11
10
9
Bit 8
$0022
TIMA counter register low (TACNTL)
Bit 7
6
5
4
3
2
1
Bit 0
$0023
TIMA Counter modulo reg. high (TAMODH)
Bit 15
14
13
12
11
10
9
Bit 8
$0024
TIMA counter modulo reg. low (TAMODL)
Bit 7
6
5
4
3
2
1
Bit 0
$0025
TIMA Ch. 0 Status/control register (TASC0) CH0F
CH0IE
MS0B
MS0A
ELS0B ELS0A
TOV0 CH0MAX $0026
TIMA Ch. 0 register high (TACH0H)
Bit 15
14
13
12
11
10
9
Bit 8
$0027
TIMA Ch. 0 register low (TACH0L)
Bit 7
6
5
4
3
2
1
Bit 0
$0028
TIMA Ch. 1 status/control register (TASC1) CH1F
CH1IE
MS1A
ELS1B ELS1A
TOV1 CH1MAX $0029
TIMA Ch. 1 register high (TACH1H)
Bit 15
14
13
12
11
10
9
Bit 8
$002A
TIMA Ch. 1 register Low (TACH1L)
Bit 7
6
5
4
3
2
1
Bit 0
$002B
TIMA Ch. 2 Status/Control register (TASC2) CH2F
CH2IE
MS2B
MS2A
ELS2B ELS2A
TOV2 CH2MAX $002C
TIMA Ch. 2 register High (TACH2H)
Bit 15
14
13
12
11
10
9
Bit 8
$002D
TIMA Ch. 2 register Low (TACH2L)
Bit 7
6
5
4
3
2
1
Bit 0
$002E
TIMA Ch. 3 Status/Control register (TASC3) CH3F
CH3IE
MS3A
ELS3B ELS3A
TOV3 CH3MAX $002F
TIMA Ch. 3 register High (TACH3H)
Bit 15
14
13
12
11
10
9
Bit 8
$0030
TIMA Ch. 3 register Low (TACH3L)
Bit 7
6
5
4
3
2
1
Bit 0
$0031
= Unimplemented
5-tima