
Index
INDEX-4
MC68SC302 USER’S MANUAL
MOTOROLA
Internal Loopback
4-13
Loopback Control
4-13
Low Power
6-17
Low Power Modes
6-10
M
Main Controller
4-1
Maintenance Channel
4-6
Mask All (MALL)
3-2
MC145474
4-5
MC145572
4-5
MC145574
4-5
MC68SC302 Block Diagram
1-4
MC68SC302 Key Features
1-1
MEMCS16
2-5
MEMR
2-5
MEMW
2-5
Modem Signals
4-12
Monitor Channel
4-8
Monitor Channel Protocol
4-53
MRBLR
4-24
Multi-Function I/O Pins
2-12
Multi-Function Pins
2-15
Multiplexed Interfaces
4-4
N
NMSI
4-1, 4-4, 4-12
Modem Signals
4-12
SIMODE
4-12
NMSICS
2-12
NT1 TA Block Diagram with POTS Interface
and Datapump
1-6
O
One-Clock-Prior Mode
4-10
Open Drain IRQOUT
3-3
Ordering Information
8-3
P
Package Dimensions
8-2
Package, TQFP
8-1
PACNT
2-13, 2-14
PADAT
2-13, 2-14
PADDR
2-14
Parallel CIS EEPROM
6-4
Parallel CIS EEPROM Configuration
6-1
Parallel CIS Mode
2-8
Parallel I/O Port
Port A
Control Register
2-13
Data Direction Register (PADDR)
2-
13
Parameter RAM
5-5, 6-3, 6-7
Passive NT1 TA Block Diagram
1-5
Passive NT1 TA Block Diagram with S/T
Interface
1-6
PC Card TA
1-7
PC_A25
2-8
PC_CE1
2-8
PC_CE2
2-8
PC_CISCS
2-8
PC_E2E
2-8
PC_MODE
2-8
PC_OE
2-8
PC_READY/IREQ
2-9
PC_REG
2-9
PC_STSCHG
2-8, 3-2, 6-18
PC_WAIT
2-9
PC_WE
2-8
PCM
4-1, 4-4
PCM Channel
4-10
PCM Highway
Envelope Mode
4-10
L1SY0
4-10
One-Clock-Prior Mode
4-10
PCM Channel
4-10
PCM Highway Mode
4-9
RTS
4-10
SIMODE
4-12
Time Slots
4-10
PCM Highway Interface, RTS
4-10
PCM Highway Mode
4-9
PCMCIA Address Bus
2-8
PCMCIA Address Map
6-4
PCMCIA Controller Features
6-1
PCMCIA Data Bus
2-8
PCMCIA EEPROM Format
6-18
PCMCIA Interface
1-1, 2-7
Enabling
2-7
PCMCIA Memory Map
6-3
PCMCIA Mode Signals
2-7
Periodic Interrupt Timer
3-4
Peripheral Input Pin Used As General-