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參數資料
| 型號： | MC74HC51 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 2-Wide, 2-Input/2-Wide, 3-Input AND-NOR Gates |
| 中文描述： | 2，寬，2-Input/2-Wide，3輸入與-或非門 |
| 文件頁數： | 2/4頁 |
| 文件大小： | 146K |
| 代理商： | MC74HC51 |
MOTOROLA
High–Speed CMOS Logic Data
DL129 — Rev 6
2
(Plastic DIP or SOIC Package)
260
* Maximum Ratings are those values beyond which damage to the device may occur.
Derating — Plastic DIP: – 10 mW/ C from 65 to 125 C
SOIC Package: – 7 mW/ C from 65 to 125 C
For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
RECOMMENDED OPERATING CONDITIONS
Symbol
VCC
Vin, Vout
TA
tr, tf
Parameter
DC Supply Voltage (Referenced to GND)
DC Input Voltage, Output Voltage (Referenced to GND)
Min
2.0
0
Max
6.0
VCC
+ 125
Unit
V
V
Operating Temperature, All Package Types
– 55
C
Input Rise and Fall Time
0
1000
ns
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to GND)
VCC = 2.0 V
Guaranteed Limit
VCC
– 55 to
Voltage
20
μ
A
4.5
6.0
3.15
4.2
3.15
4.2
3.15
4.2
6.0
1.2
1.2
1.2
VOH
Minimum High–Level Output
Vin = VIH or VIL
2.0
1.9
1.9
1.9
5.2 mA
5.48
5.34
5.20
V
VOL
Maximum Low–Level Output
Vin = VIH or VIL
|Iout|
6.0
2.0
6.0
0.1
0.1
0.1
0.1
0.1
0.1
4.0 mA
5.2 mA
0.26
0.26
0.33
0.33
0.40
0.40
V
Iin
Maximum Input Leakage Current
Vin = VCC or GND
|Iout|
4.5
6.0
6.0
0.1
1.0
1.0
A
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance cir-
cuit. For proper operation, Vin and
Vout should be constrained to the
range GND (Vin or Vout)
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
VCC.
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