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參數資料
| 型號： | PLL2710A |
| 元件分類： | PLL合成/DDS/VCOs |
| 英文描述： | PHASE LOCKED LOOP, 2740 MHz, QMA14 |
| 文件頁數： | 1/2頁 |
| 文件大小： | 301K |
| 代理商： | PLL2710A |
PLL2710A
Telecommunications
Satellite
Telemetry
5
30
2670
-65
1.25
-20
5
1
-40 to +85
Frequency Range
RMS Phase Error (100 Hz - 100 KHz)
Harmonic Suppression (2nd, typ.)
Sideband Spurs (typ.)
Switching Speed (typ., adjacent channel)
Startup Lock Time (typ.)
Operating Temperature Range
Package Style
PLL
MHz
°
dBc
mSec
°C
Vdc
mA
Supply Voltage (Vcc, nom.)
Supply Current (Icc, typ.)
All specifications are typical unless otherwise noted and subject to change without notice.
PHASE NOISE (1 Hz BW, typical)
Z-Communications, Inc.
All rights reserved
Page 1
PHASE LOCKED LOOP
FEATURES
APPLICATIONS
PERFORMANCE SPECIFICATIONS
VALUE
UNITS
POWER SUPPLY REQUIREMENTS
APPLICATION NOTES
2670
MHz
Step Size:
1000 KHz
- Style Package
PLL
A1
Rev
AN-107 : How to Solder Z-COMM VCOs / PLLs
AN-115 : Mounting and Grounding of Z-COMM PLLs
AN-116 : How to Program Z-COMM PLLs
NOTES:
Reference Oscillator Signal: 5 MHz<
fosc<40 MHz
9939 Via Pasar San Diego, CA 92126
TEL (858) 621-2700
FAX (858) 621-2722
Power Output
1±4
dBm
Load Impedance
50
Step Size
1000
KHz
LOW
2740
-
Frequency Range:
-
2740
Charge Pump Output Current
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