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參數資料
| 型號： | RD74LVC1G125WPE |
| 元件分類： | 門電路 |
| 英文描述： | LVC/LCX/Z SERIES, 1-INPUT NON-INVERT GATE, PBGA5 |
| 封裝： | 0.70 X 1.10 MM, 0.40 MM PITCH, 0.40 MM HEIGHT, FBGA-5 |
| 文件頁數： | 9/10頁 |
| 文件大小： | 1866K |
| 代理商： | RD74LVC1G125WPE |
RD74LVC1G125
Rev.1.00 Apr 13, 2006 page 6 of 7
Test Circuit
OPEN
TEST
S1
VTT
S1
CL
RL
GND
t
/ t
PLH
PHL
t
/ t
ZH
HZ
t
/ t
ZL
LZ
1.8±0.15
2.5±0.2
3.3±0.3
5.0±0.5
INPUTS
VCC (V)
VCC
2
× VCC
2
× VCC
6 V
2
× VCC
VCC / 2
1.5 V
VCC / 2
VCC
VI
Vref
CL
RL
V
VTT
tr / tf
500
0.15 V
0.3 V
500
500
1.0 k
Load circuit
From Output
≤ 2 ns
≤ 2.5 ns
30 pF
50 pF
Vref
VI
0 V
t PLH
V
t PHL
OH
VOL
Input A
Output Y
VOH
VOL
Input
OE
Vref
VOH – V
VOL + V
Vref
VI
VOH
0 V
VOL
t HZ
t LZ
t ZH
t ZL
Output Y
(Waveform – A)
Output Y
(Waveform – B)
Notes: 1. CL includes probe and jig capacitance.
2. Waveform–A is for an output with internal conditions such that the output is low except
when disabled by the output control.
3. Waveform–B is for an output with internal conditions such that the output is high except
when disabled by the output control.
4. All input pulses are supplied by generators having the following characteristics:
PRR
≤ 10MHz, Zo = 50 .
5. The output are measured one at a time with one transition per measurement.
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| RD74LVC1G126 | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Bus Buffer with 3-state Output |
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| RD74LVC1G14 | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Schmitt-trigger Inverter Buffer |
| RD74LVC1G14WPE | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Schmitt-trigger Inverter Buffer |
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