
R5
J2
Vin+
R6
U1
2
3
6
7
4 1
8
J8*
Vs+
C8*
R4
R7
C7*
J9*
R2
J4
Vout
Vs -
R3
J1
Vin-
TP1
+
C1
VS-
J7
C6
C5
C2
VS+
J5
+
FB2
C4
C3
FB1
VS-
GND
VS+
J6
_
+
*Does Not Apply to the THS3201
PD
768
768
49.9
0
PD Ref
49.9
Not Populated
0.1
F
22
F
100 pF
0.1
F
22
F
SGLS283B – APRIL 2005 – REVISED JANUARY 2009 ..................................................................................................................................................... www.ti.com
Figure 66. THS3201 EVM Circuit Configuration
24
Copyright 2005–2009, Texas Instruments Incorporated