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參數(shù)資料
| 型號： | TLV2548MPWREP |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | ADC |
| 英文描述： | 8-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20 |
| 封裝： | GREEN, PLASTIC, TSSOP-20 |
| 文件頁數(shù)： | 9/37頁 |
| 文件大小： | 915K |
| 代理商： | TLV2548MPWREP |
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INTERNAL
REF
Close = Int Ref Used
Open = Ext Ref Used
REFM (See Note 1)
Sample
Convert
~50 pF
CDAC
External to the Device
10-mF
Internal
Reference
Compensation
Cap
0.1-mF
Decoupling
Cap
REFP
www.ti.com
SLAS668 – OCTOBER 2009
Reference Block Equivalent Circuit
A.
If internal reference is used, tie REFM to analog ground and install a 10-
μF (or 4.7-μF) internal reference
compensation capacitor between REFP and REFM to store the charge as shown in the figure above.
B.
If external reference is used, the 10-
μF (internal reference compensation) capacitor is optional. REFM can be
connected to external REFM or AGND.
C.
Internal reference voltage drift, due to temperature variations, is approximately ±10 mV about the nominal 2 V
(typically) from –10°C to 100°C. The nominal value also varies approximately ±50 mV across devices.
D.
Internal reference leakage during low ON time: Leakage resistance is on the order of 100 M
or more. This means
the time constant is about 1000 s with 10-
μF compensation capacitance. Since the REF voltage does not vary much,
the reference comes up quickly after resuming from auto power down. At power up and power down the internal
reference sees a glitch of about 500
μV when 2-V internal reference is used (1 mV when 4-V internal reference is
used). This glitch settles out after about 50
μs.
Figure 16. Reference Block Equivalent Circuit
Power Down
The device has three power-down modes.
Autopower-Down Mode
The device enters the autopower-down state at the end of a conversion.
In autopower-down, the power consumption reduces to about 1 mA when an internal reference is selected. The
built-in reference is still on to allow the device to resume quickly. The resumption is fast enough (within
0.5 SCLK) for use between cycles. An active CS, FS, or CSTART resumes the device from power-down state.
The power current is 1
μA when an external reference is programmed and SCLK stops.
Hardware/Software Power-Down Mode
Writing 8000h to the device puts the device into a software power-down state, and the entire chip (including the
built-in reference) is powered down. For a hardware power down, the dedicated PWDN pin provides another way
to power down the device asynchronously. These two power-down modes power down the entire device
including the built-in reference to save power. The power-down current is reduced to about 1
μA as the SCLK is
stopped.
Copyright 2009, Texas Instruments Incorporated
17
Product Folder Link(s): TLV2548-EP
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