
W39V040B
Publication Release Date: April 14, 2005
- 25 -
Revision A3
Timing Waveforms, for LPC Interface Mode, continued
13.3 Program Cycle Timing Diagram
LAD[3:0]
1st Start
Memory
Load Address "5555" in 8 Clocks
CLK
1 Clock
1 Clock
TAR
Start next
1 Clock
2 Clocks
1 Clock
011Xb
0000b
XXXXb
XXXXb
XXXXb
XXXXb
X101b
0101b
0101b
0101b
Load Data "AA" in 2 Clocks
1010b
1010b
Write the 1st command to the device in LPC mode.
2nd Start
Load Address "2AAA" in 8 Clocks
1 Clock
1 Clock
TAR
Start next
1 Clock
2 Clocks
1 Clock
011Xb
0000b
XXXXb
XXXXb
XXXXb
XXXXb
X010b
1010b
1010b
1010b
Load Data "55"
0101b
0101b
Write the 2nd command to the device in LPC mode.
3rd Start
Load Address "5555" in 8 Clocks
1 Clock
1 Clock
TAR
Start next
1 Clock
2 Clocks
1 Clock
011Xb
0000b
XXXXb
XXXXb
XXXXb
XXXXb
X101b
0101b
0101b
0101b
Load Data "A0"
in 2 Clocks
1010b
0000b
Write the 3rd command to the device in LPC mode.
4th Start
Load Ain in 8 Clocks
CLK
CLK
CLK
1 Clock
1 Clock
TAR
Sync
Internal
TAR
1 Clock
2 Clocks
011Xb
0000b
A[15:12]
Load Din in 2 Clocks
D[7:4]
Write the 4th command(target location to be programmed) to the device in LPC mode.
A[11:8]
A[7:4]
A[3:0]
D[3:0]
1111b
Tri-State
0000b
Data
Address
Address
Address
Address
Sync
TAR
Data
Sync
TAR
Data
Sync
TAR
Data
1111b
Tri-State
0000b
1111b
Tri-State
0000b
1111b
Tri-State
0000b
Memory
Memory
Write
Memory
Internal
program start
A[19:16]
A[31:28]
A[23:20]
A[27:24]
LAD[3:0]
LAD[3:0]
LAD[3:0]
#LFRAM
#RESET
#LFRAM
#RESET
#LFRAM
#RESET
#LFRAM
#RESET