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參數資料
| 型號： | W39V080AT |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | PROM |
| 英文描述： | 1M 】 8 CMOS FLASH MEMORY WITH LPC INTERFACE |
| 中文描述： | 1M X 8 FLASH 3.3V PROM, 11 ns, PDSO40 |
| 封裝： | 10 X 20 MM, TSOP-40 |
| 文件頁數： | 29/34頁 |
| 文件大小： | 287K |
| 代理商： | W39V080AT |
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W39V080A
Publication Release Date: Dec. 28, 2005
- 29 -
Revision A4
Timing Waveforms for LPC Interface Mode, continued
14.6 Sector Erase Timing Diagram
6th Start
Load Sector Address in 8 Clocks
1 Clock
1 Clock
TAR
Sync
Internal
erase start
TAR
1 Clock
2 Clocks
011Xb
0000b
XXXXb
XXXXb
XXXXb
XXXXb
SA[19:16]
Load Data "30"
0011b
Write the 6th command(target sector to be erased) to the device in LPC mode.
0000b
1111b
Tri-State
0000b
Data
Address
1st Start
Load Address "5555" in 8 Clocks
CLK
1 Clock
1 Clock
TAR
Start next
1 Clock
2 Clocks
1 Clock
011Xb
0000b
XXXXb
XXXXb
XXXXb
XXXXb
X101b
0101b
0101b
0101b
Load Data "AA"
in 2 Clocks
1010b
1010b
Write the 1st command to the device in LPC mode.
CLK
CLK
CLK
Address
Sync
TAR
Data
2nd Start
Load Address "2AAA" in 8 Clocks
1 Clock
1 Clock
TAR
Start next
1 Clock
2 Clocks
1 Clock
011Xb
0000b
XXXXb
XXXXb
XXXXb
XXXXb
X010b
1010b
1010b
1010b
Load Data "55"
0101b
0101b
Write the 2nd command to the device in LPC mode.
3rd Start
Load Address "5555" in 8 Clocks
1 Clocks
1 Clocks
TAR
Start next
1 Clocks
2 Clocks
1 Clocks
011Xb
0000b
XXXXb
XXXXb
XXXXb
XXXXb
X101b
0101b
0101b
0101b
Load Data "80"
in 2 Clocks
1000b
0000b
Write the 3rd command to the device in LPC mode.
Address
Address
Sync
TAR
Data
Sync
TAR
Data
1111b
Tri-State
0000b
1111b
Tri-State
0000b
1111b
Tri-State
0000b
4th Start
Memory
Write
Cycle
Load Address "5555" in 8 Clocks
1 Clock
1 Clock
TAR
Start next
1 Clock
2 Clocks
1 Clock
011Xb
0000b
XXXXb
XXXXb
XXXXb
XXXXb
X101b
0101b
0101b
0101b
Load Data "AA"
1010b
1010b
Write the 4th command to the device in LPC mode.
5th Start
Load Address "2AAA" in 8 Clocks
1 Clock
1 Clock
TAR
Start next
command
1 Clock
2 Clocks
1 Clock
011Xb
0000b
XXXXb
XXXXb
XXXXb
XXXXb
X010b
1010b
1010b
1010b
Load Data "55"
0101b
0101b
Write the 5th command to the device in LPC mode.
Address
Address
Sync
TAR
Data
Sync
TAR
Data
1111b
Tri-State
0000b
1111b
Tri-State
0000b
CLK
CLK
XXXXb
XXXXb
XXXXb
Memory
Write
Cycle
Memory
Cycle
Memory
Write
Cycle
Memory
Memory
Write
Internal
LAD[3:0]
LAD[3:0]
LAD[3:0]
LAD[3:0]
LAD[3:0]
LAD[3:0]
#LFRAME
#RESET
#LFRAME
#RESET
#LFRAME
#RESET
#LFRAME
#RESET
#LFRAME
#RESET
#LFRAME
#RESET
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