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參數(shù)資料
型號(hào): W741C201
廠商: WINBOND ELECTRONICS CORP
元件分類: 微控制器/微處理器
英文描述: 4-BIT Microcontroller(多次可編程4位的微控制器)
中文描述: 4-BIT, MROM, 4.19 MHz, MICROCONTROLLER, PDIP18
封裝: 0.300 INCH, PLASTIC, DIP-18
文件頁(yè)數(shù): 21/84頁(yè)
文件大?。?/td> 486K
代理商: W741C201
Preliminary W741C20X
Publication Release Date: March 1998
- 21 -
Revision A3
T1
T2
T3
T4
CLKO
(RE1)
Data latch
BUSYO
(PSR2.3)
EVF6
Ins.
DOUT
(RE0)
Notes : 1. These clocks at the CLKO pin are internal clock and its frequency is Fosc/2.
2. When the internal signal of the data latch equals to "1,"
then the data of the RAM and ACC be loaded to SOB.
SOP R
1
2
3
4
5
6
7
8
Figure 12. Timing of the Serial Output Function (SOP R)
In the above description, the low nibble location of the serial input/output register is contributed to the
ACC, and the high nibble is to R. The port status register 2 (PSR2) including BUSY
I,
and BUSY
O
can
be read out or cleared by the MOVA R, PSR2, or CLR PSR2 instruction.
Port Status Register 2 (PSR2)
Port status register 2 is organized as 4-bit binary register (PSR2.0 to PSR2.3). PSR2 is controlled by
the MOVA R, PSR2, and CLR PSR2
instructions. The bit descriptions are as follows:
R
R
0
1
2
3
PSR2
Note: R means read only.
Bit 0 is reserved.
Bit 1 (BUSY
I):
Serial port input busy flag.
Bit 2 is reserved.
Bit 3 (BUSY
O):
Serial port output busy flag.
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