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參數資料
| 型號： | W741C250 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT Microcontroller(多次可編程4位的微控制器) |
| 中文描述： | 4-BIT, MROM, 4.19 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | 14 X 20 MM, QFP-64 |
| 文件頁數： | 15/88頁 |
| 文件大?。?/td> | 496K |
| 代理商： | W741C250 |
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W741C250
Publication Release Date: March 1998
- 15 -
Revision A4
HEF.3 Reserved
HEF.4 = 1 Falling edge signal at the
INT
pin causes hold mode to be released.
HEF.5 & HEF.6 are reserved.
HEF.7 = 1 Underflow from Timer 1 causes hold mode to be released.
Interrupt Enable Flag (IEF)
The interrupt enable flag is organized as an 8-bit binary register (IEF.0 to IEF.7). These bits are used
to control the interrupt conditions. It is controlled by the MOV IEF, #I instruction. When one of these
interrupts is accepted, the corresponding bit of the event flag will be reset, but the other bits are
unaffected. In interrupt subroutine, these interrupts will be disabled till the instruction MOV IEF, #I
or
EN INT
is executed again. Besides, these interrupts can be disabled by executing DIS INT instruction.
The bit descriptions are as follows:
1
2
3
4
5
6
0
7
IEF
w
w
w
w
w
Note: W means write only.
IEF.0 = 1 Interrupt 0 is accepted by overflow from Divider 0.
IEF.1 = 1 Interrupt 1 is accepted by underflow from Timer 0.
IEF.2 = 1 Interrupt 2 is accepted by a signal change on port RC.
IEF.3 Reserved
IEF.4 = 1 Interrupt 4 is accepted by a falling edge signal on the
INT
pin.
IEF.5 & IEF.6 are reserved.
IEF.7 = 1 Interrupt 7 is accepted by underflow from Timer 1.
Port Enable Flag (PEF)
The port enable flag is organized as a 4-bit binary register (PEF.0 to PEF.3). Before port RC may be
used to release the hold mode or perform an interrupt function, the content of the PEF must be set
first. The PEF is controlled by the MOV PEF, #I instruction. The bit descriptions are as follows:
PEF
w
w
w
0
1
2
w
3
Note: W means write only.
PEF.0: Enable/disable the signal change on pin RC.0 to release hold mode or perform interrupt.
PEF.1: Enable/disable the signal change on pin RC.1 to release hold mode or perform interrupt.
PEF.2: Enable/disable the signal change on pin RC.2 to release hold mode or perform interrupt.
PEF.3: Enable/disable the signal change on pin RC.3 to release hold mode or perform interrupt.
Stop Mode Wake-up Enable Flag for Port RC (SEF)
The stop mode wake-up flag for port RC is organized as a 4-bit binary register (SEF.0 to SEF.3).
Before port RC may be used to make the device exit the stop mode, the content of the SEF must be
set first. The SEF is controlled by the MOV SEF, #I instruction. The bit descriptions are as follows:
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| W741E202 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:4-BIT FLASH MICROCONTROLLER |
| W741E203 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:4-BIT FLASH MICROCONTROLLER |
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