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參數(shù)資料
| 型號： | W741L250 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT MICROCONTROLLER |
| 中文描述： | 4-BIT, MROM, 1 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | 14 X 20 MM, QFP-64 |
| 文件頁數(shù)： | 24/86頁 |
| 文件大小： | 478K |
| 代理商： | W741L250 |
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W741L250
- 24 -
When Fw = 32.768 KHz, the LCD frequency is as shown in the table below.
LCD FREQUENCY
Fw/512 (64 Hz)
Fw/256 (128 Hz)
Fw/128 (256 Hz)
Fw/64 (512 Hz)
STATIC
64
128
256
512
1/2 DUTY
32
64
128
256
1/3 DUTY
21
43
85
171
1/4 DUTY
16
32
64
128
Corresponding to the 24 LCD drive output pins, there are 24 LCD data RAM segments (LCDR00 to
LCDR17). Instructions such as MOV LCDR, #I; MOV WR, LCDR; MOV LCDR, WR; and MOV LCDR,
ACC are used to control the LCD data RAM. The data in the LCD data RAM are transferred to the
segment output pins automatically without program control. When the bit value of the LCD data RAM
is "1," the LCD is turned on. When the bit value of the LCD data RAM is "0," the LCD is turned off.
The contents of the LCD data RAM (LCDR) are sent out through the segment 0 to segment 23 pins by
a direct memory access. The relationship between the LCD data RAM and segment/common pins is
shown below.
COM3
bit 3
0/1
0/1
.
.
.
0/1
0/1
COM2
bit 2
0/1
0/1
.
.
.
0/1
0/1
COM1
bit 1
0/1
0/1
.
.
.
0/1
0/1
COM0
bit 0
0/1
0/1
.
.
.
0/1
0/1
LCD data RAM
LCDR00
LCDR01
Output pin
SEG0
SEG1
.
.
.
.
.
.
LCDR16
LCDR17
SEG22
SEG23
The LCDON instruction turns the LCD display on (even in HOLD mode), and the LCDOFF instruction
turns the LCD display off. At initial reset, all the LCD segments are lit. When the initial reset state
ends, the LCD display is turned off automatically. To turn on the LCD display, the instruction LCDON
must be executed. When the drive output pins are used as DC output ports (set by option codes,
please refer the user's manual of ASM741S assembler for more detail), CMOS output type or NMOS
output type can be selected by executing the instruction MOV LCDM, #I. The relation between the
LCD data RAM and segment/common pins is shown below. The data in LCDR00 are transferred to
the corresponding segment output port (SEG3 to SEG0) by a direct memory access. The other LCD
data RAM segments can be used as normal data RAM to store data.
LCD DATA RAM
LCDR00
LCDR03
LCDR01
LCDR04
LCDR07
LCDR05
OUTPUT PIN
SEG3
SEG0
BIT 3
SEG3
-
SEG7
-
.
.
.
SEG23
-
BIT 2
SEG2
-
SEG6
-
.
.
.
SEG22
-
BIT 1
SEG1
-
SEG5
-
.
.
.
SEG21
-
BIT 0
SEG0
-
SEG4
-
.
.
.
SEG20
-
-
SEG7
SEG4
-
.
.
.
.
.
.
LCDR14
LCDR17
LCDR15
SEG23
SEG20
-
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