
W741L260
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2. Page Register (PAGE)
The page register is organized as a 4-bit binary register. The bit descriptions are as follows:
R/W
R/W
R/W
R/W
0
1
2
3
PAGE
Note: R/W means read/write available.
Bit 3 is reserved.
Bit 2, Bit 1, Bit 0 Indirect addressing mode preselect bits:
000 = Page 0 (00H
0FH)
010 = Page 2 (20H
2FH)
100 = Page 4 (40H
4FH)
110 = Page 6 (60H
6FH)
001 = Page 1 (10H
1FH)
011 = Page 3 (30H
3FH)
101 = Page 5 (50H
5FH)
111 = Page 7 (70H
7FH)
Accumulator (ACC)
The accumulator (ACC) is a 4-bit register used to hold results from the ALU and transfer data
between the memory, I/O ports, and registers.
Arithmetic and Logic Unit (ALU)
This is a circuit which performs arithmetic and logic operations. The ALU provides the following
functions:
Logic operations: ANL, XRL, ORL
Branch decisions: JB0, JB1, JB2, JB3, JNZ, JZ, JC, JNC, DSKZ, DSKNZ, SKB0, SKB1, SKB2,
SKB3
Shift operations: SHRC, RRC, SHLC, RLC
Binary additions/subtractions: ADC, SBC, ADD, SUB, ADU, DEC, INC
After any of the above instructions are executed, the status of the carry flag (CF) and zero flag (ZF) is
stored in the internal registers. Otherwise CF can be stored or be read out by executing MOVA R, CF
or MOV CF, R.
Clock Generator
The W741L260 provides two oscillation circuits, main-oscillator and sub-oscillator. The main-oscillator
can select the crystal or RC oscillation circuit by option codes to generate the system clock through
external connections. If a crystal oscillator is used, a crystal or a ceramic resonator must be
connected to XIN1 and XOUT1, and a capacitor must be connected if an accurate frequency is
needed. When the oscillator is used, only low-frequency clock (32 KHz) can be selected for the
system clock by means of option codes. If the RC oscillator is used, a resistor must be connected to
XIN1 and XOUT1, and the high/low frequency clock option must be selected to suit the operation
frequency. The sub-oscillator must be connected to a 32.768 KHz crystal through XIN2 and XOUT2
external pins when the dual-clock operation mode is selected by option code. The connection is
shown in Figure 3. One machine cycle consists of a four-state system clock sequence and can run up
to 4
μ
S with a 1 MHz system clock.