
Preliminary W77LE58
Publication Release Date: August 1999
- 69 - Revision A1
Program/Erase Inhibit Operation
This operation allows parallel erasing or programming of multiple chips with different data. When
P3.6(CE) = V
IH
, P3.7(OE) = V
IH
, erasing or programming of non-targeted chips is inhibited. So,
except for the P3.6 and P3.7 pins, the individual chips may have common inputs.
Company/Device ID Read Operation
This operation is supported for MTP ROM programmer to get the company ID or device ID on the
W77LE58.
Operations
P3.0
(A9
CTRL)
CTRL)
CTRL)
CTRL)
Read
0
0
0
0
0
Output Disable
0
0
0
0
0
Program
0
0
0
0
0
Program Verify
0
0
0
0
1
Erase
1
0
0
0
0
P3.1
(A13
P3.2
(A14
P3.3
(OE
P3.6
(CE)
P3.7
(OE)
EA
(V
PP
)
P2,P1
(A15..A0)
P0
(D7..D0)
Note
0
1
1
0
1
1
1
Address Data Out
X
Address
Address Data Out
A0:0,
others: X
Hi-Z
Data In
V
CP
V
CP
V
EP
@3
@4
Data In
0FFH
Erase Verify
Program/Erase
Inhibit
Company ID
Device ID
1
X
0
0
0
0
0
0
1
1
0
1
V
EP
V
CP
/
V
EP
1
1
Address Data Out
X
@5
X
1
1
0
0
0
0
0
0
0
0
0
0
A0 = 0
A0 = 1
Data Out
Data Out
Notes:
1. All these operations happen in RST = V
IH
, ALE = V
IL
and
PSEN
= V
IH
.
2. V
CP
= 12.5V, V
EP
= 14.5V, V
IH
= V
DD
, V
IL
= V
SS
.
3. The program verify operation follows behind the program operation.
4. This erase operation will erase all the on-chip ROM cells and the Security bits.
5. The erase verify operation follows behind the erase operation.