
W78E858
- 2 -
6.16.1
6.16.2
6.16.3
6.16.4
6.16.5
F04KBOOT Mode (Boot From 4K Bytes LDROM)....................................................... 20
6.17.1
F04KBOOT Mode.........................................................................................................20
Security......................................................................................................................... 20
6.18.1
Lock Bit (Bit0)...............................................................................................................21
6.18.2
MOVC Lock (Bit1) ........................................................................................................21
6.18.3
Scramble Enable (Bit2).................................................................................................21
6.18.4
Oscillator Gain Select (Bit7) .........................................................................................21
Watch Dog Timer.......................................................................................................... 21
6.19.1
WDTC (8FH) ................................................................................................................22
Programmable Clock-out.............................................................................................. 22
Reduce EMI Emission .................................................................................................. 22
ELECTRICAL CHARACTERISTICS......................................................................................... 23
7.1
Absolute Maximum Ratings.......................................................................................... 23
7.2
D.C. Characteristics...................................................................................................... 23
7.3
A.C. Characteristics...................................................................................................... 25
7.3.1
Clock Input Waveform....................................................................................................25
7.3.2
Program Fetch Cycle......................................................................................................25
7.3.3
Data Read Cycle ............................................................................................................26
7.3.4
Data Write Cycle.............................................................................................................26
7.3.5
Port Access Cycle ..........................................................................................................26
7.3.6
Flash Mode Timing.........................................................................................................26
TIMING WAVEFORMS............................................................................................................. 27
8.1
Program Fetch Cycle.................................................................................................... 27
8.2
Data Read Cycle........................................................................................................... 27
8.3
Data Write Cycle........................................................................................................... 28
8.4
Port Access Cycle......................................................................................................... 28
TYPICAL APPLICATION CIRCUITS........................................................................................ 29
9.1
Expanded External Program Memory and Crystal....................................................... 29
9.2
Expanded External Data Memory and Oscillator ......................................................... 30
PACKAGE DIMENSIONS......................................................................................................... 31
10.1
40-pin DIP..................................................................................................................... 31
10.2
44-pin PLCC ................................................................................................................. 31
10.3
44-pin PQFP................................................................................................................. 32
VERSION HISTORY................................................................................................................. 33
IE_1 (E8H)....................................................................................................................18
IP1 (F8H)......................................................................................................................18
IX1 (E9H)......................................................................................................................19
IRQ1 (C0H) ..................................................................................................................19
Interrupt Priority and Vector Address............................................................................19
6.17
6.18
6.19
6.20
6.21
7.
8.
9.
10.
11.