
W79E804A/803A/802A
Publication Release Date: July 16, 2007
- 27 -
Revision A2
BIT
NAME
FUNCTION
7
EA
Global enable. Enable/Disable all interrupts.
6
-
Reserved.
5
EBO
Enable Brown Out interrupt.
4
ES
Enable Serial Port interrupt.
3
ET1
Enable Timer 1 interrupt.
2
EX1
Enable external interrupt 1.
1
ET0
Enable Timer 0 interrupt.
0
EX0
Enable external interrupt 0.
SLAVE ADDRESS
Bit:
7
6
5
4
3
2
1
0
SADDR.7
SADDR.6
SADDR.5
SADDR.4
SADDR.3
SADDR.2
SADDR.1
SADDR.0
Mnemonic: SADDR
Address: A9h
BIT
NAME
FUNCTION
7-0
SADDR.[7:0]
The SADDR should be programmed to the given or broadcast address for
serial port to which the slave processor is designated.
COMPARATOR 1 CONTROL REGISTER
Bit:
7
6
5
4
3
2
1
0
-
-
CE1
CP1
CN1
OE1
CO1
CMF1
Mnemonic: CMP1
Address: ACh
BIT
NAME
FUNCTION
7
6
-
-
Reserved.
Reserved.
Comparator enable:
0: Disable Comparator.
1: Enabled Comparator. Comparator output need wait stable 10 us after CE1 is
first set.
Comparator positive input select:
0: CIN1A is selected as the positive comparator input.
1: CIN1B is selected as the positive comparator input.
Comparator negative input select:
0: The comparator reference pin CMPREF is selected as the negative
comparator input.
1: The internal comparator reference Vref is selected as the negative comparator
input.
5
CE1
4
CP1
3
CN1