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參數資料
| 型號： | W81C180 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 總線控制器 |
| 英文描述： | USB HUB Controller Interface(USB結構的集線器控制器接口) |
| 中文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PDIP32 |
| 封裝： | PLASTIC, DIP-32 |
| 文件頁數： | 6/11頁 |
| 文件大小： | 83K |
| 代理商： | W81C180 |
W81C180
Publication Release Date:May 1997
- 6 -
Revision A1
For example, for the uC to read the W81C180's StatusRegister0 only and the value is E9h:
ST 11101001
AW SR0 (8)
NA SP
ST=Start AW=W81C180 Acknowledge AU= uC Acknowledge NA=No Acknowledge
SP=Stop
SR0 (8) = Status Register 0 (8 bits) (MSB 1st) 11101001=W81C180's Read Address
W81C180 INTERRUPTS:
The NINT pin will be enabled and disabled under the following actions:
ENABLE INTERRUPT
Any
USB
(connect/disconnect.)
Downstream resume
Endpoint 1 data received
Endpoint 0 data received
Turnaround time-out
Suspend (no activity) on the USB bus
Reset sent from upstream
Babble or loss of data on the USB bus
OCP tripped
DISABLE INTERRUPT
After the uC reads the StatusRegisters.
port
changes
status
After the uC reads the StatusRegisters.
After endpoint 1's FIFO is read.
After the uC reads the StatusRegisters.
After the uC reads the StatusRegisters.
After the uC reads the StatusRegisters.
After the uC reads the StatusRegisters.
After the uC reads the StatusRegisters.
After the uC reads the StatusRegisters.
REACTING TO W81C180 INTERRUPTS:
Since there is no condition which requires immediate attention by the uC, the NINT pin does not
necessarily have to be used. The uC can access the W81C180 in a number of possible ways:
- Do not use the NINT pin. Read the Status Register 0 periodically, i.e. every vertical refresh.
- Have the NINT pin go to any pin on the uC, poll that pin periodically and read the W81C180 Status
registers when it is enabled.
- Have the NINT pin go to an interrupt pin to the uC and read the W81C180 Status registers when it is
enabled.
USB RESET:
The W81C180 handles the USB reset function independently from the uC. If a Single Ended Zero
(SE0) is detected on the upstream port (port0) for greater then 2.5us, then the SE0 is transmitted to
all configured ports and the interrupt is enabled. The uC should then disable all downstream ports,
reset its address to 0, and enter the active state.
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相關代理商/技術參數 |
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