
DUAL BANK DDR BUFFER FOR VIA CHIPSET
- II -
W83176R-733/W83176G-733
Table of Content-
1.
GENERAL DESCRIPTION ......................................................................................................... 1
2.
PRODUCT FEATURES.............................................................................................................. 1
3.
PIN CONFIGURATION............................................................................................................... 1
4.
BLOCK DIAGRAM...................................................................................................................... 2
5.
PIN DESCRIPTION..................................................................................................................... 3
5.1
Clock Function Pins..................................................................................................................3
5.2
Control Signal Pins...................................................................................................................3
6.
POWER PINS ............................................................................................................................. 4
7.
I2C CONTROL AND STATUS REGISTERS.............................................................................. 4
7.1
Register 0 ~ Register 5 RESERVED.......................................................................................4
7.2
Register 6: Output Control (1 = Enable, 0 = Disable) (Default: FFh)......................................4
7.3
Register 7: Output Control (1 = Enable, 0 = Disable) (Default: FFh)......................................4
7.4
REGISTER 8 ~ Register 17 RESERVED...............................................................................5
7.5
Skew step reference Table......................................................................................................5
7.6
Register 18: Skew Control (Default: 88h)................................................................................5
7.7
Register 19: Skew Control (Default: 80h)................................................................................5
7.8
Slew rate reference table.........................................................................................................6
7.9
Register 20: Skew & Slew Rate Control (Default: 8Ah)..........................................................6
7.10
Register 21: Slew Rate Control (Default: AAh).......................................................................6
7.11
Register 22: Slew Rate Control (Default: AAh).......................................................................6
7.12
Register 23: Slew Rate Control (Default: AAh).......................................................................7
8.
ACCESS INTERFACE................................................................................................................ 8
8.1
Block Write Protocol.................................................................................................................8
8.2
Block Read Protocol.................................................................................................................8
8.3
Byte Write Protocol...................................................................................................................8
8.4
Byte Read Protocol..................................................................................................................8
9.
SPECIFICATIONS...................................................................................................................... 9
9.1
ABSOLUTE MAXIMUM RATINGS .........................................................................................9
9.2
AC CHARACTERISTICS.........................................................................................................9
9.3
DC CHARACTERISTICS ........................................................................................................9
10.
ORDERING INFORMATION..................................................................................................... 10
11.
HOW TO READ THE TOP MARKING...................................................................................... 10
12.
PACKAGE DRAWING AND DIMENSIONS.............................................................................. 11