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參數(shù)資料
| 型號： | W83176R-732 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 時鐘及定時 |
| 英文描述： | WINBOND 2DIMM DDR ZERO DELAY BUFFER FOR SIS CHIPSET |
| 中文描述： | 83176 SERIES, PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| 封裝： | 0.209 INCH, SSOP-28 |
| 文件頁數(shù)： | 5/11頁 |
| 文件大小： | 251K |
| 代理商： | W83176R-732 |
W83176R-732
Publication Release Date: April 13, 2005
- 3 -
Revision 1.1
5.1
Clock Outputs
PIN
PIN NAME
TYPE
DESCRIPTION
27, 25, 16,
14, 5, 1
CLKC [5:0]
OUT
Complementary Clocks of differential pair outputs
26, 24, 17,
13, 4, 2
CLKT [5:0]
OUT
True Clocks of differential pair outputs
22
SDATA *
I/O
Serial data of I
2
C 2-wire control interface
Internal pull-up resistor 120K to VDD
Serial clock of I
2
C 2-wire control interface
7
SCLK *
IN
Internal pull-up resistor 120K to VDD
8
CLK_INT
IN
True reference clock input, 3.3V tolerant input
9, 18, 21
N/C
NC
Not connected
True Feedback output, dedicated for external feedback.
It switches at the same frequency as the CLK. This
output must be wired to FB_INT.
True Feedback input, provides feedback signal to the
internal PLL for synchronization with CLK_INT to
eliminate phase error.
19
FB_OUTT
OUT
20
FB_INT
IN
5.2 Power Pins
PIN
PIN NAME
GND
VDD
DESCRIPTION
6, 11, 15, 28
3, 12, 23
Ground
Power supply 2.5V
10
AVDD
Analog power supply, 2.5V
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| W83178S | 100 MHZ 3-DIMM SDRAM BUFFER |
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| W83193R-04 | 83.3 MHZ 3-DIMM CLOCK |
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| W83176R-732_06 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:2 DIMM DDR ZERO DELAY buffer for Sis chipset |
| W83176R-733 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:Winbond Dual Bank DDR BUFFER For VIA CHIPSET |
| W83176R-735 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:DIMM DDR ZERO DELAY BUFFER |
| W83176R-735_06 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:DIMM DDR ZERO DELAY BUFFER |
| W83178S | 制造商:WINBOND 制造商全稱:Winbond 功能描述:100 MHZ 3-DIMM SDRAM BUFFER |
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