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參數資料
| 型號： | W83194BR-138 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 英文描述： | 200MHZ CLOCK FOR SOLANO CHIPSET |
| 中文描述： | 200MHz的芯片組的索拉諾 |
| 文件頁數： | 4/10頁 |
| 文件大小： | 135K |
| 代理商： | W83194BR-138 |
W83194AR-73
PRELIMINARY
Publication Release Date: May 1999
Revision 0.30
- 4 -
5.1 Register 0: CPU Frequency Select Register
Bit
7
@PowerUp
0
Pin
-
Description
0 =
ó
0.25% Center type Spread Spectrum Modulation
1 = 0~ 0.5% Down type
Spread Spectrum Modulation
SSEL2 ( Frequency table selection by software via I
2
C)
SSEL1 ( Frequency table selection by software via I
2
C)
SSEL0 ( Frequency table selection by software via I
2
C)
0 = Selection by hardware
1 = Selection by software I
2
C - Bit (2, 6:4),
Register1 Bit1
SSEL3 (Frequency table selection by software via I
2
C )
0 = Normal
1 = Spread Spectrum enabled
0 =
Running
1 = Tristate all outputs
6
5
4
3
0
0
0
0
-
-
-
-
2
1
0
0
-
-
0
0
-
5.2 Register 1 : CPU Clock Register (1 = Active, 0 = Inactive)
Bit
7
6
5
4
3
2
1
0
@PowerUp
X
X
X
1
1
1
1
1
Pin
-
-
-
28
27
26
-
31
Description
FS3#
FS0#
FS2#
24_48MHz(Active / Inactive)
48MHz-0(Active / Inactive)
48MHz-1(Active / Inactive)
SEL_3V66(Frequency table selection by software via I
2
C )
SDRAM_F(Active / Inactive)
5.3 Register 2: SDRAM Clock Register (1 = Active, 0 = Inactive)
Bit
7
6
5
4
3
2
1
0
@PowerUp
1
1
1
1
1
1
1
1
Pin
32
33
35
36
37
39
40
41
Description
SDRAM7 (Active / Inactive)
SDRAM6 (Active / Inactive)
SDRAM5 (Active / Inactive)
SDRAM4 (Active / Inactive)
SDRAM3 (Active / Inactive)
SDRAM2 (Active / Inactive)
SDRAM1 (Active / Inactive)
SDRAM0 (Active / Inactive)
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PDF描述 |
|---|---|
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相關代理商/技術參數 |
參數描述 |
|---|---|
| W83194BR-250 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Step-less Frequency VIA Pro266/PL266 Clock Gen. |
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| W83194BR-372 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:CLOCK GENERATOR FOR SIS 746/748 CHIPSETS |
| W83194BR-39B | 制造商:WINBOND 制造商全稱:Winbond 功能描述:STEP-LESS 3-DIMM CLOCK |
| W83194BR-603 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:Winbond Clock Generator For INTEL P4 Springdale Series Chipset |
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