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W83194AR-73
PRELIMINARY
Publication Release Date: May 1999
Revision 0.30
- 3 -
4.0 FREQUENCY SELECTION BY HARDWARE
FS3 FS2 FS1 FS0 CPU(MHz)
SDRAM
(MHz)
3V66 (MHz)
PCI(MHz)
IOAPIC
(MHz)
SEL_3V66=0
SEL_3V66=1
0
0
0
0
100.23
100.23
66.82
66.82
33.41
16.71
0
0
0
1
100.9
100.9
67.26
67.26
33.63
16.815
0
0
1
0
105
105
70
70
35
17.5
0
0
1
1
66.89
100.33
66.89
66.89
33.44
16.72
0
1
0
0
120
120
64
80
40
20.00
0
1
0
1
124
124
64
82.66
41.33
20.67
0
1
1
0
133.3
133.3
66.65
88.86
44.43
22.22
0
1
1
1
133.6
100.2
66.65
66.65
33.32
16.66
1
0
0
0
140
140
70
70
35
17.5
1
0
0
1
150
150
64
75
37.50
18.75
1
0
1
0
114.99
114.99
64
76.66
38.33
19.17
1
0
1
1
70
105
70
70
35
17.5
1
1
0
0
75
112.5
64
75
37.5
18.75
1
1
0
1
83.31
124.96
64
83.31
41.65
20.825
1
1
1
0
90
90
60
60
30
15
1
1
1
1
95
95
63.33
63.33
31.67
15.84
5.0
SERIAL CONTROL REGISTERS
The Pin column lists the affected pin number and the @PowerUp column gives the state at true
power up. Registers are set to the values shown only on true power up. "Command Code" byte and
"Byte Count" byte must be sent following the acknowledge of the Address Byte. Although the data
(bits) in these two bytes are considered "don't care", they must be sent and will be acknowledge.
After that, the below described sequence (Register 0, Register 1, Register 2, ....) will be valid and
acknowledged.
相關PDF資料 |
PDF描述 |
|---|---|
| W83194BR-C | 200MHZ CLOCK FOR CAMINO CHIPSET |
| W83194BR-KT | STEP-LESS 3-DIMM K7 CLOCK |
| W83194BR-KX | STEP-LESS 3-DIMM K7 CLOCK |
| W83194BR-S | 200MHZ 2-DIMM CLOCK FOR SOLANO CHIPSET |
| W83194R-17 | 100MHZ AGP CLOCK FOR SIS CHIPSET |
相關代理商/技術參數 |
參數描述 |
|---|---|
| W83194BR-C | 制造商:WINBOND 制造商全稱:Winbond 功能描述:200MHZ CLOCK FOR CAMINO CHIPSET |
| W83194BR-KT | 制造商:WINBOND 制造商全稱:Winbond 功能描述:STEP-LESS 3-DIMM K7 CLOCK |
| W83194BR-KX | 制造商:WINBOND 制造商全稱:Winbond 功能描述:STEP-LESS 3-DIMM K7 CLOCK |
| W83194BR-P4X | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Step-less VIA P4X/P4M Main Clock Gen. |
| W83194BR-PT | 制造商:WINBOND 制造商全稱:Winbond 功能描述:STEPLESS VIA PT MAIN CLOCK GENERATOR |
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