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參數(shù)資料
| 型號： | W83629D |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 總線控制器 |
| 英文描述： | A Condensed Centralizer IC For IRQ and DMA Control.(用于中斷請求和直接存儲器存儲控制的中心器) |
| 中文描述： | PCI BUS CONTROLLER, PQFP48 |
| 封裝： | LQFP-48 |
| 文件頁數(shù)： | 8/27頁 |
| 文件大小： | 271K |
| 代理商： | W83629D |
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PCI TO ISA BRIDGE SET
W83628F & W83629D
PRELIMINARY
Publication Release Date: Jan 1999
- 8 -
Revision 0.32
1.1.3 ISA Interface Signals
SYMBOL
SA[19:17]
PIN
98-96
I/O
FUNCTION
OUT24t
System Address Bus.
These are the upper address lines that
define the ISA
s
byte granular address space (up to 1 Mbyte).
SA[19:17] are at an unknown state upon PCIRST#.
System Address Bus.
These are the bi-directional lower
address lines that define the ISA
s
byte granular address space
(up to 1 Mbyte). SA[16:0] are at an unknown state upon
PCIRST#.
System Data.
SD[15:0] provide the 16-bit data path for devices
residing on the ISA Bus. The W83628F tri-states SD[15:0] during
PCIRST#.
SA[16:0]
94-83
81-77
I/O24t
SD[15:0]
110-
107,
104,
103,
101,
100,
8-15
118
I/O24t
AEN
OUT24t
Address Enable.
AEN is asserted during DMA cycles. This
signal is also driven high during W83628F initiated refresh
cycles. AEN is driven low upon PCIRST#.
I/O Read.
IOR# is the command to an ISA I/O slave device that
the slave may drive data on to the ISA data bus (SD[15:0]).
I/O Write.
IOW# is the command to an ISA I/O slave device that
the slave may latch data from the ISA data bus (SD[15:0]).
I/O Channel Ready.
Resources on the ISA Bus negate
IOCHRDY to indicate that additional time (wait states) is required
to complete the cycle.
ISA System Clock.
SYSCLK is the reference clock for the ISA
bus. The SYSCLK is generated by dividing PCICLK by 3 or 4.
Reset Drive.
W83628F asserts RSTDRV to reset devices that
reside on the ISA Bus. The W83628F asserts this signal while
the PCIRST# is asserted.
16-bit I/O Chip Select.
This signal is driven by I/O devices on
the ISA Bus to indicate that they support 16-bit I/O bus cycles.
System Byte High Enable.
SBHE# asserted indicates that a
byte is being transferred on the upper byte (SD[15:8]) of the data
bus. SBHE# is at an unknown state upon PCIRST#.
I/O Channel Check.
IOCHK# can be driven by any resource on
the ISA bus during on detection of an error.
IOR#
120
I/O24t
IOW#
121
I/O24t
IOCHRDY
116
I/O24t
SYSCLK
99
OUT24t
RSTDRV
74
OUT24t
IOCS16#
124
INt
SBHE#
18
I/O24t
IOCHK#
105
INt
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| W83628F | PCI TO ISA BRIDGE SET |
| W83637HF | LPC I/O |
| W83637HF-AW | LPC I/O |
| W83697HF | WINBOND I/O |
| W83697 | WINBOND I/O |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W83637HF | 制造商:WINBOND 制造商全稱:Winbond 功能描述:LPC I/O |
| W83637HF_06 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:LPC I/O |
| W83637HF-AW | 制造商:WINBOND 制造商全稱:Winbond 功能描述:LPC I/O |
| W83637HG | 制造商:WINBOND 制造商全稱:Winbond 功能描述:LPC I/O |
| W83637HG-AW | 功能描述:IC I/O CONTROLLER 128-QFP RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:* 標準包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2 |
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