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參數資料
| 型號： | W83768 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 其它接口 |
| 英文描述： | I/O COUPLER |
| 中文描述： | SPECIALTY INTERFACE CIRCUIT, PQFP48 |
| 封裝： | QFP-48 |
| 文件頁數： | 3/8頁 |
| 文件大小： | 147K |
| 代理商： | W83768 |
W83768
Publication Release Date: October 1994
- 3 -
Revision A1
Line Receivers, continued
PIN NO.
23
33
SYMBOL
RVIN10
I/O
I
I/O
DESCRIPTION
Receiver input 10
During normal operations, this pin works as receiver output
#1. During power-on reset, this pin is used to select power-
down control (PDC) mode enable level.
RVOP1
When
RVOP1
is set to high at power-on, PDC is high
active. When
RVOP1
is set to low at power-on, PDC is low
active.
Receiver output 2
34
RVOP2
O
35
RVOP3
O
Receiver output 3
37
RVOP4
O
Receiver output 4
41
RVOP5
O
Receiver output 5
47
RVOP6
O
Receiver output 6
1
RVOP7
O
Receiver output 7
2
RVOP8
O
Receiver output 8
3
RVOP9
O
Receiver output 9
4
RVOP10
O
Receiver output 10
Game Port
PIN NO.
11
10
31
30
42
SYMBOL
GPO0
GPO1
GBO0
GBO1
I/O
I/O
I/O
I
I
I
DESCRIPTION
Game port RC constant (open drain)
Game port RC constant (open drain)
Game port button input
Game port button input
Game port read. This pin is internally pulled-up to make it
convenient to disable the game port.
Game port write
GMRD
43
GMWR
I
Control Signals
PIN NO.
5
32
SYMBOL
MR
PDCIN
I/O
I
I
DESCRIPTION
Master reset signal input
This pin is used to enable/disable the power-down function.
The active level of this pin depends on how pin
RVOP1
is
programmed at power-on. If
RVOP1
is set high at power-
on, for example, then setting PDCIN to high will cause the
W83768 to enter power-down mode.
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