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參數資料
| 型號： | W83791SG |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 音頻合成 |
| 英文描述： | H/W MONITORING IC |
| 中文描述： | SPEECH SYNTHESIZER, PQFP48 |
| 封裝： | LQFP-48 |
| 文件頁數： | 7/22頁 |
| 文件大小： | 426K |
| 代理商： | W83791SG |
W83791SD/W83791SG
- 4 -
6. FUNCTION DESCRIPTION
6.1 Speech Function
6.1.1 General Description
The W83791SD/SG is a derivative of Winbond's
PowerSpeech
TM
synthesizers. There are up to 5
hardware trigger inputs and 128 programmable software event trigger inputs. If more than two events
happen simultaneously, the priority set by the internal H/W is: SLOTOCC# > EVNTRAP1 > EVNTRAP2
> EVNTRAP3 > EVNTRAP4 > EVNTRAP5 > TRIGREG (Index 09h) 128 events. Software trigger is
able to accommodate 128 event triggers, with timeout register (index 08h) enabled in advance for
allowance of time on detecting devices. That is, once the system’s power is on, BIOS can fill trigger
event and speech voice will not be sent until the system fails owing to timeout. In addition, to prevent
events from taking place simultaneously.
6.1.2 Event Trigger Queue
W83791SD/SG provides 8 byte FIFO queue to store event trigger, i.e., the first 8 event can be served
by speech and speech will clear FIFO queue after service. Coding of Speech program must assign
correct CPU_MODE event vector to issue correct speech voices correspondent to speech trigger
events. For example, CPU_MODE event vector =1 represents absence of CPU, then coding speech
with CPU is absent voice. When W83791SD/SG detects no CPU exists, it will send vector = 1 to
speech synthesizer and play this voice data. Following is the block diagram of the 8-Byte event trigger
queue.
8-bit Counter
Trigger
Timeout Register
(Index 08h)
CLK 1 HZ
Timeout
Comparator
TEvent
Trigger Data
(Index 09h, b6~0)
Enable Timeout
(Index 0Ah, b6)
8-Byte Event Trigger Queue
Figure 1. Event trigger Queue
For example: As BIOS usually has POST (Power On Self Test) program, then it will test every item step
by step if no failure takes place, however, if it detects a failure on a specific item, it will hang on there.
Therefore, BIOS could write timeout value to register 08h and start timer setup speech trigger event
(register 09h), then BIOS test program starts. Whenever the system is hang on specific item such as
DRAM testing, W83791SD/SG would say “DRAM test fails” after the timeout previously set at CR [08h].
On the contrary, if DRAM test is ok, then BIOS could update the timeout value and proceed to the next
test program.
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