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參數資料
| 型號： | W86L387D |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 其它接口 |
| 英文描述： | Winbond Host Interface Memory StickTM Bridge |
| 中文描述： | SPECIALTY INTERFACE CIRCUIT, PQFP48 |
| 封裝： | 7 X 7 MM, 1.4 MM HEIGHT, LQFP-48 |
| 文件頁數： | 9/25頁 |
| 文件大小： | 375K |
| 代理商： | W86L387D |
W86L387D
PRELIMINARY
Publication Release Date: July 2001
- 6 -
Revision 0.50
6. REGISTERS
6.1 Register Map
The register in the W86L387D is consisted of command, status, control, received/transmit data buffer,
interrupt, DMA and parallel port registers and READY register in Host interface type 2, these registers
are listed as follows:
Addr
Content (note 2)
A[3:1]
Register Name
(note 1)
B1
5
B1
4
B1
3
B1
2
B1
1
B1
0
B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
PID code
Data size
000
Command Reg. (R/W)
0
0
0
0
-
-
0
0
0
0
0
0
0
0
0
0
Status
001
Status Reg. (RO)
0
0
-
-
1
0
1
0
-
-
-
-
-
-
-
-
Control
001
Control Reg. (R/W)
-
-
-
-
-
-
-
-
0
0
0
0
0
1
0
1
Receive data buffer
010
Receive Data Buffer (R/O)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Transmit data buffer
010
Transmit Data Buffer (WO)
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Interrupt status
011
Interrupt Status Reg. (RO)
1
0
0
0
-
-
0
0
-
-
-
-
-
-
-
-
Interrupt control
011
Interrupt Control Reg.
(R/W)
-
-
-
-
-
-
-
-
0
0
0
-
-
-
-
-
PI[3:0]
PO[3:0]
100
Parallel Port Data Reg.
([15:12]RO, [11:8]R/W)
X
X
X
X
X
X
X
X
-
-
-
-
-
-
-
-
PIEN[3:0]
POEN[3:0]
100
Parallel Port Control Reg.
(R/W)
-
-
-
-
-
-
-
-
0
0
0
0
0
0
0
0
F
101
Ready Control Reg. (R/W)
0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
8-
bit
111
Data Size Reg. (R/W)
-
-
-
-
-
-
-
-
0
0
0
0
0
0
0
0
Note 1:
R/W means the register can be read and write.
RO means the register is read only.
WO means the register is write only.
Note 2:
The data bit in the content is the initial value during hardware reset.
0: the bit value is 0.
1: the bit value is 1.
X: the bit value is unknown.
-: Undefined bit in the register and the value will read 0.
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相關代理商/技術參數 |
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