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參數資料
| 型號： | W89C982AF |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 通信及網絡 |
| 英文描述： | INTEGRATED MULTIPLE REPEATER II |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQFP100 |
| 封裝： | QFP-100 |
| 文件頁數： | 6/28頁 |
| 文件大小： | 277K |
| 代理商： | W89C982AF |
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Preliminary W89C982AF
- 6 -
Continued
MANAGEMENT BUS PINS
NAME
NO.
I/O
DESCRIPTION
MSI
27
I
Management Data in:
The management command is serially clocked into IMPR II by
MCLK.
MSO
29
O
Management Data Out:
The network status or the internal management status of the IMPR
II is serially read out from MSO whenever the IMPR II receives a
status read command.
TEST
37
I
IMPR II Test Mode:
This pin should be tied high during test mode and tied low during
normal operations.
PCRS
32
O
Network Port Carrier Sense:
The carrier sense signals for the IMPR II's internal logic from the
AUI port and eight TP ports are serially sampled and output
through PCRS. The output bits are stream synchronized to X1
clock.
STR
31
O
Network Port Carrier Sense Strobe:
The serial bit stream on PCRS can be latched by an external latch
using the STR signal. The STR goes high for two X1 clock cycles
after the nine carrier sense bits are output through PCRS.
X1
34
I
System Clock Input:
An external 20 MHz system clock source is connected to this pin to
provide the operating clock. For crystal applications, a 20 MHz
crystal may be connected across pins X1 and X2.
X2
35
O
Crystal Clock Feedback:
Pin X2 should be left floating when an external clock source is
used.
PORT STATUS DIRECT REPORT INTERFACE PINS
M1
M0
25
26
I
Port Status Direct Report Select Pins:
These two pins control the output status of the port status pins.
Four output states can be selected by M1, M0:
TP Link/Activity Partition Polarity error Utilization
AUI COL/Activity Partition Loopback error Utilization
M1 0 0 1 1
M0 0 1 0 1
XCOL-
RPT
47
O
Collision Status Direct Report Output: Whenever a collision event
occurs, this pin is active high. This pin drives a TTL data buffer,
which directly drives an LED.
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