- 您現在的位置：買賣IC網 > PDF目錄363909 > W981616AH-7 (WINBOND ELECTRONICS CORP) x16 SDRAM PDF資料下載
參數資料
| 型號： | W981616AH-7 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | DRAM |
| 英文描述： | x16 SDRAM |
| 中文描述： | 1M X 16 SYNCHRONOUS DRAM, 5.5 ns, PDSO50 |
| 封裝： | 0.400 INCH, TSOP2-50 |
| 文件頁數： | 2/40頁 |
| 文件大小： | 1015K |
| 代理商： | W981616AH-7 |
第1頁當前第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁
W981616BH
- 2 -
PIN DESCRIPTION
PIN NUMBER PIN NAME
20
24,
27
32
19
FUNCTION
DESCRIPTION
A0
A10
Address
Multiplexed pins for row and column address.
Row address: A0
A10. Column address: A0
A7.
Select bank to activate during row address latch time,
or bank to read/write during column address latch
time.
BA
Bank Select
2, 3, 5, 6, 8, 9,
11, 12, 39, 40,
42, 43, 45, 46,
48, 49
DQ0
DQ15
Data Input/
Output
Multiplexed pins for data input and output.
18
CS
Chip Select
Disable or enable the command decoder. When
command decoder is disabled, new command is
ignored and previous operation continues.
17
RAS
Row Address
Strobe
Command input. When sampled at the rising edge of
the clock,
RAS
,
CAS
and
WE
define the operation
to be executed.
16
CAS
Column
Address Strobe
Referred to
RAS
15
WE
Write Enable Referred to
RAS
36, 14
UDQM/
LDQM
Input/Output
Mask
The output buffer is placed at Hi-Z (with latency of 2)
when DQM is sampled high in read cycle. In write
cycle, sampling DQM high will block the write
operation with zero latency.
35
CLK
Clock Inputs
System clock used to sample inputs on the rising
edge of clock.
34
CKE
Clock Enable CKE controls the clock activation and deactivation.
When CKE is low, Power Down mode, Suspend
mode, or Self Refresh mode is entered.
1, 25
V
CC
Power (+3.3V) Power for input buffers and logic circuit inside DRAM.
26, 50
V
SS
Ground
Ground for input buffers and logic circuit inside
DRAM.
7, 13, 38, 44,
V
CC
Q
Power (+3.3V)
for I/O buffer
Separated power from V
CC
, used for output buffers to
improve noise immunity.
4, 10, 41, 47
V
SS
Q
Ground for I/O
buffer
Separated ground from V
SS
, used for output buffers
to improve noise immunity.
33, 37
NC
No Connection No connection
相關PDF資料 |
PDF描述 |
|---|---|
| W981616AH-8 | x16 SDRAM |
| W9816G6BB | 512K x 2 BANKS x 16 BITS SDRAM |
| W9816G6BB-7 | 512K x 2 BANKS x 16 BITS SDRAM |
| W982516BH | 4M X 4 BANKS X 16 BIT SDRAM |
| W982516BH-7 | 4M X 4 BANKS X 16 BIT SDRAM |
相關代理商/技術參數 |
參數描述 |
|---|---|
| W981616AH-8 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:x16 SDRAM |
| W981616BH | 制造商:WINBOND 制造商全稱:Winbond 功能描述:512K ⅴ 2 BANKS ⅴ 16 BITS SDRAM |
| W981616BH-7 | 制造商:Winbond Electronics Corp 功能描述:SDRAM, 1M x 16, 50 Pin, Plastic, TSOP |
| W9816G6BB | 制造商:WINBOND 制造商全稱:Winbond 功能描述:512K x 2 BANKS x 16 BITS SDRAM |
| W9816G6BB-7 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:512K x 2 BANKS x 16 BITS SDRAM |
發布緊急采購，3分鐘左右您將得到回復。