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參數(shù)資料
| 型號： | W982516BH-7 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | DRAM |
| 英文描述： | 4M X 4 BANKS X 16 BIT SDRAM |
| 中文描述： | 16M X 16 SYNCHRONOUS DRAM, 5.4 ns, PDSO54 |
| 封裝： | 0.400 INCH, 0.80 MM PITCH, TSOP2-54 |
| 文件頁數(shù)： | 3/43頁 |
| 文件大小： | 1570K |
| 代理商： | W982516BH-7 |
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W982516BH
Publication Release Date: December 13, 2001
- 3 -
Revision A2
1. GENERAL DESCRIPTION
W982516BH is a high-speed synchronous dynamic random access memory (SDRAM), organized as
4M words
×
4 banks
×
16 bits. Using pipelined architecture and 0.175
μ
m process technology,
W982516BH delivers a data bandwidth of up to 143M words per second (-7). To fully comply with the
personal computer industrial standard, W982516BH is sorted into two speed grades: -7 and -75. The -
7 is compliant to the 143 MHz/CL3 or PC133/CL2 specification, the -75 is compliant to the PC133/CL3
specification, for handheld device application, we also provide a low power option, the 75L grade, with
Self Refresh Current under 1mA., and an industrial temperature option, the grade of 75I, which is
guranteed to support -40
°
C – 85
°
C.
Accesses to the SDRAM are burst oriented. Consecutive memory location in one page can be
accessed at a burst length of 1, 2, 4, 8 or full page when a bank and row is selected by an ACTIVE
command. Column addresses are automatically generated by the SDRAM internal counter in burst
operation. Random column read is also possible by providing its address at each clock cycle. The
multiple bank nature enables interleaving among internal banks to hide the precharging time.
By having a programmable Mode Register, the system can change burst length, latency cycle,
interleave or sequential burst to maximize its performance. W982516BH is ideal for main memory in
high performance applications.
2. FEATURES
3.3V
±
0.3V Power Supply
Up to 143 MHz Clock Frequency
4,194,304 Words
×
4 Banks
×
16 Bits Organization
Self Refresh Mode: Standard and Low Power
CAS Latency: 2 and 3
Burst Length: 1, 2, 4, 8, and Full Page
Burst Read, Single Writes Mode
Byte Data Controlled by LDQM, UDQM
Power-down Mode
Auto Precharge and Controlled Precharge
8K Refresh Cycles/64 mS
Interface: LVTTL
Packaged in TSOP II 54-pin, 400 mil - 0.80
3. AVAILABLE PART NUMBER
PART NUMBER
SPEED GRADE
SELF REFRESH CURRENT
(MAX.)
3 mA
3 mA
1 mA
1 mA
OPERATING
TEMPERATURE
0
°
C
70
°
C
0
°
C
70
°
C
0
°
C
70
°
C
-40
°
C
85
°
C
W982516BH-7
W982516BH-75
W982516BH75L
W982516BH75I
PC133/CL2
PC133/CL3
PC133/CL3
PC133/CL3
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| W982516BH-75 | 4M X 4 BANKS X 16 BIT SDRAM |
| W982516BH75I | 4M X 4 BANKS X 16 BIT SDRAM |
| W982516BH75L | 4M X 4 BANKS X 16 BIT SDRAM |
| W9828BADA | 128MB (16M x 64) PC100 SDRAM MODULE(符合PC100標準的128MB (16M x 64) 同步動態(tài)RAM模塊) |
| W9832AADA | 32MB (4M x 64) PC100 SDRAM MODULE(符合PC100標準的32MB (4M x 64) 同步動態(tài)RAM模塊) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W982516BH-75 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:4M X 4 BANKS X 16 BIT SDRAM |
| W982516BH75I | 制造商:WINBOND 制造商全稱:Winbond 功能描述:4M X 4 BANKS X 16 BIT SDRAM |
| W982516BH75L | 制造商:WINBOND 制造商全稱:Winbond 功能描述:4M X 4 BANKS X 16 BIT SDRAM |
| W9825G2JB | 制造商:WINBOND 制造商全稱:Winbond 功能描述:2M ? 4 BANKS ? 32BITS SDRAM |
| W9825G2JB-6 | 制造商:Winbond Electronics Corp 功能描述:DRAM Chip SDRAM 256M-Bit 8Mx32 3.3V 90-Pin TFBGA 制造商:Winbond Electronics Corp 功能描述:IC SDRAM 256MBIT 166MHZ 制造商:Winbond Electronics Corp 功能描述:IC SDRAM 256MBIT 166MHZ 90TFBGA |
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