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參數(shù)資料
| 型號(hào)： | 4450HA/3-K |
| 廠(chǎng)商： | EXAR CORP |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | MICROPROCESSOR, PBGA324 |
| 封裝： | HSBGA-324 |
| 文件頁(yè)數(shù)： | 43/92頁(yè) |
| 文件大小： | 780K |
| 代理商： | 4450HA/3-K |
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4450 – Data Sheet, DS-0131-06
Page 48
Hifn Confidential
6.2.4
GMAC SERDES & SGMII Interface Usage (Host/
Network)
This section discusses the use of GMAC interfaces for both the network and host side
interfaces n0, n1, h0, h1 when configured to support operation in SERDES or SGMII modes.
The signal SERDES_RREF (ball number U10) is used to set the nominal drive current for the
SERDES output. This signal should be connected through a 1K-1% ohm resistor to VDDS
(1.0V).
For applications that use the SERDES/SGMII interface instead of the GMII/TBI interface,
the control pins and clock pins for the unused interface may be connected through pull-
down or pull-up resistors. Unused bus input pins may be terminated with pull-up or pull-
down resistors. Unused bus output pins may be left unconnected.
6.2.4.1
GMAC SERDES & SGMII Pin Mappings (Host /Network)
Table 6-12. 4450 SERDES and SGMII MAC/PHY modes pin mappings
Pin Name
MAC-SERDES
PHY-SERDES
MAC-SGMII
PHY-SGMII
SERDES Signal I/O
SGMII Signal
I/O
SGMII Signal
I/O
srefclk_p
refclk_p
in
refclk_p
in
refclk_p
in
refclk_p
in
srefclk_n
refclk_n
in
refclk_n
in
refclk_n
in
refclk_n
in
xx_bus1_p
xx_rxd_p
in
xx_txd_p
in
xx_rxd_p
in
xx_txd_p
in
xx_bus1_n
xx_rxd_n
in
xx_txd_n
in
xx_rxd_n
in
xx_txd_n
in
xx_bus0_p
xx_txd_p
out
xx_rxd_p
out
xx_txd_p
out
xx_rxd_p
out
xx_bus0_n
xx_txd_n
out
xx_rxd_n
out
xx_txd_n
out
xx_rxd_n
out
Note
xx = n0, n1, h0 or h1
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