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參數資料
| 型號： | AD7790B |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | ADC |
| 英文描述： | Low Power, 16-Bit Buffered Sigma-Delta ADC |
| 中文描述： | 低功耗，16位緩沖Σ-Δ模數轉換器 |
| 文件頁數： | 15/20頁 |
| 文件大小： | 299K |
| 代理商： | AD7790B |
AD7790
Single Conversion Mode
In single conversion mode, the AD7790 is placed in shutdown
mode between conversions. When a single conversion is initi-
ated by setting MD1 to 1 and MD0 to 0 in the mode register, the
AD7790 powers up, performs a single conversion, and then
returns to shutdown mode. A conversion will require a time
period of 2 × t
ADC
. DOUT/RDY goes low to indicate the com-
pletion of a conversion. When the data-word has been read
from the data register, DOUT/RDY will go high. If CS is low,
DOUT/RDY will remain high until another conversion is initi-
ated and completed. The data register can be read several times,
if required, even when DOUT/ RDY has gone high.
Rev. 0 | Page 15 of 20
Continuous Conversion Mode
This is the default power-up mode. The AD7790 will continu-
ously convert, the RDY pin in the status register going low each
time a conversion is complete. If CS is low, the DOUT/RDY line
will also go low when a conversion is complete. To read a con-
version, the user can write to the communications register,
indicating that the next operation is a read of the data register.
The digital conversion will be placed on the DOUT/RDY pin as
soon as SCLK pulses are applied to the ADC. DOUT/RDY will
return high when the conversion is read. The user can read this
register additional times, if required. However, the user must
ensure that the data register is not being accessed at the comple-
tion of the next conversion or else the new conversion word will
be lost.
03538-0-010
DIN
0x10
0x82
0x10
0x82
DATA
DATA
SCLK
DOUT/RDY
CS
Figure 8. Single Conversion
03538-0-012
DIN
SCLK
DOUT/RDY
CS
0x38
0x38
DATA
DATA
Figure 9. Continuous Conversion
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| AD7790BRMZ | 制造商:Analog Devices 功能描述:IC 24-BIT ADC |
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