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參數(shù)資料
| 型號： | AD7801 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | +2.7 V to +5.5 V, Parallel Input, Voltage Output 8-Bit DAC |
| 中文描述： | 2.7 V至5.5 V，電壓并行輸入輸出8位DAC |
| 文件頁數(shù)： | 11/16頁 |
| 文件大小： | 219K |
| 代理商： | AD7801 |
AD7801
–11–
REV. 0
In the circuit shown the
LDAC
is hardwired low thus the DAC
output is updated on the rising edge of
WR
. Some applications
may require synchronous updating of the DAC in the AD7801.
In this case the
LDAC
signal can be driven from an external
timer or can be controlled by the microprocessor. One option
for synchronous updating is to decode the
LDAC
from the ad-
dress bus so a write operation at this address will synchronously
update the DAC output. A simple OR gate with one input
driven from the decoded address and the second input from the
WR
signal will implement this function.
AD7801–8051/8088 Interface
Figure 31 shows a serial interface between the AD7801 and the
8051/8088 processors.
ADDR
DECODE
EN
ADDRESS BUS
AD7801*
CS
LDAC
WR
DB7
DB0
DATA BUS
*
ADDITIONAL CIRCUITRY OMITTED FOR CLARITY.
A15
A8
PSEN
OR
DEN
WR
AD7
AD0
8051/8088*
ALE
OCTAL
LATCH
Figure 31. AD7801–8051/8088 Interface
APPLICAT IONS
Bipolar Operation Using the AD7801
T he AD7801 has been designed for unipolar operation but
bipolar operation is possible using the circuit in Figure 32. T he
circuit shown is configured for an output voltage range of –5 V
to +5 V. Rail-to-rail operation at the amplifier output is achievable
by using an AD820 or OP295 as the output amplifier.
T he output voltage for any input code can be calculated as
follows:
V
O
=
R
2
1
+
R
4
Where
D
is the decimal equivalent of the code loaded to the
DAC and
V
REF
is the reference voltage input.
With
V
REF
= 2.5 V, R1 = R3 = 10 k
and R2 = R4 = 20 k
and
V
DD
= 5 V.
R
3
/
R
1
+
R
2
(
)
×
2
V
REF
D
256
V
REF
R
4
R
3
V
O
=
10
D
256
±5
DATA
BUS
CONTROL
INPUTS
AD7801
CS
WR
LDAC
V
OUT
D7-D0
CLR
PD
V
DD
REF IN
V
DD
= 3V TO 5V
V
DD
AGND DGND
10
m
F
0.1
m
F
0.1
m
F
EXT REF
V
OUT
V
IN
GND
AD780/REF192
WITH V
DD
= 5V
OR
AD589 WITH V
DD
= 3V
R1
10k
R2
20k
+5V
±
5V
R3
10k
R4
20k
–5V
AD820/
OP295
Figure 32. Bipolar Operation Using the AD7801
Decoding Multiple AD7801s in a System
T he
CS
pin on the AD7801 can be used in applications to
decode a number of DACs. In this application, all DACs in the
system receive the same input data, but only the
CS
to one of
the DACs will be active at any one time allowing access to one
channel in the system. T he 74HC139 is used as a two-to-four
line decoder to address any of the DACs in the system. T o
prevent timing errors from occurring, the Enable input on the
74HC139 should be brought to its inactive state while the
Coded Address inputs are changing state. Figure 33 shows a
diagram of a typical setup for decoding multiple AD7801
devices in a system. T he built-in power-on reset circuit on the
AD7801 ensures that the outputs of all DACs in the system
power up with zero volts on their outputs.
AD7801
CS
WR
D0
D7
LDAC
V
OUT
AD7801
CS
WR
D0
D7
LDAC
V
OUT
AD7801
CS
WR
D0
D7
LDAC
V
OUT
AD7801
CS
WR
D0
D7
LDAC
V
OUT
74HC139
V
CC
V
DD
1
G
1A
1B
DGND
ENABLE
CODED
ADDRESS
WR
1Y0
1Y1
1Y2
1Y3
DATA BUS
Figure 33. Decoding Multiple AD7801s
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