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參數資料
| 型號： | AD830 |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | 運動控制電子 |
| 英文描述： | High Speed, Video Difference Amplifier(高速,視頻差分運放) |
| 中文描述： | 高速，視頻差分放大器（高速，視頻差分運放） |
| 文件頁數： | 13/16頁 |
| 文件大小： | 244K |
| 代理商： | AD830 |
AD830
REV. A
–13–
Differential Line Receiver
T he AD830 was specifically designed to perform as a differen-
tial line receiver. T he circuit in Figure 33 shows how simple it is
to configure the AD830 for this function. T he signal from sys-
tem “A” is received differentially relative to A’s common, and
that voltage is exactly reproduced relative to the common in sys-
tem B. T he common-mode rejection versus frequency, shown in
Figure 1, is excellent, typically 100 dB at low frequencies. T he
high input impedance permits the AD830 to operate as a bridg-
ing amplifier across low impedance terminations with negligible
loading. T he differential gain and phase specifications are very
good as shown in Figure 7 for 500
and Figure 10 for 150
.
T he input and output common should be separated to achieve
the full CMR performance of the AD830 as a differential ampli-
fier. However, a common return path is necessary between sys-
tems A and B.
4
5
3
6
AD830
1
2
8
7
A=1
COMMON IN
SYSTEM B
V
OUT
= V
1
– V
2
COMMON IN
SYSTEM A
V
1
V
2
INPUT
SIGNAL
V
CM
Z
CM
V
P
0.1μF
V
OUT
V
N
0.1μF
G
M
G
M
C
Figure 33. Differential Line Receiver
Wide Range Level Shifter
T he wide common-mode range and accuracy of the AD830 al-
lows easy level shifting of differential signals referred to an input
common-mode voltage to any new voltage defined at the out-
put. T he inputs may be referenced to levels as high as 10 V at
the inputs with a
±
2 V swing about 10 V. In the circuit of Fig-
ure 34, the output voltage, V
OUT
, is defined by the simple equa-
tion shown below. T he excellent linearity and low distortion are
preserved over the full input and output common-mode range.
T he voltage sources need not be of low impedance, since the
high input resistance and modest input bias current of the
AD830 V-to-I converters permit the use of resistive voltage di-
viders as reference voltages.
4
5
3
6
AD830
1
2
8
7
A=1
OUTPUT
COMMON
V
OUT
= V
1
– V
2
+ V
3
V
P
0.1μF
V
OUT
V
N
0.1μF
G
M
G
M
INPUT
COMMON
V
3
C
V
1
V
2
INPUT
SIGNAL
Figure 34. Differential Amplification with Level Shifting
Difference Amplifier with Gain > 1
T he AD830 can provide instrumentation amplifier style differ-
ential amplification at gains greater than 1. T he input signal is
connected differentially and the gain is set via feedback resistors
as shown in Figure 35. T he gain, G = (R
2
+ R
1
)/R
2
. T he AD830
can provide either inverting or noninverting differential amplifi-
cation. T he polarity of the gain is established by the polarity of
the connection at the input. Feedback resistors R
2
should gener-
ally be R
2
≤
1 k
to maintain closed-loop stability and also keep
bias current induced offsets low. Highest CMRR and lowest dc
offsets are preserved by including a compensating resistor in
series with Pin 3. T he gain may be as high as 100.
4
5
3
6
AD830
1
2
8
7
A=1
V
OUT
= (V
1
– V
2
) (1+R
1
/R
2
)
V
P
0.1μF
V
OUT
V
N
0.1μF
G
M
G
M
R1
R2
Z
CM
R
1
R
2
V
1
V
2
INPUT
SIGNAL
C
V
CM
Figure 35. Gain of G Differential Amplifier, G > 1
Offsetting the Output with Gain
Some applications, such as A/D drivers, require that the signal
be amplified and also offset, typically to accommodate the input
range of the device. T he AD830 can offset the output signal
very simply through Pin 3 even with gain > 1. T he voltage ap-
plied to Pin 3 must be attenuated by an appropriate factor so
that V
3
3
G = desired offset. In Figure 36, a resistive divider
from a voltage reference is used to produce the attenuated offset
voltage.
4
5
3
6
AD830
1
2
8
7
A=1
V
OUT
= (V
1
– V
2
) (1+R
1
/R
2
)
V
1
V
2
INPUT
SIGNAL
V
P
0.1μF
V
OUT
V
N
0.1μF
G
M
G
M
R
3
R
4
Z
CM
R
2
R
1
R
1
R
2
V
3
V
REF
C
V
CM
Figure 36. Offsetting the Output with Differential Gain > 1
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