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14.8 Operation of the Operation Mode 1
Figure 14.8-7 8-bit Transmitting Operation in CLK Synchronous Mode
I
Continuous Transmission at Operation Mode 1
In CLK synchronous mode, not only 8-bit data transmission but also continuous transmission
can be performed. The transmitting operation is performed by setting the TXE/RXE bits to "11"
and writing data to the SODR register. When transmission starts, the data written to the SODR
register is loaded to the shifter and the shift operation is performed. When the data in the
SODR register is loaded to the shifter, the TDRE flag is set to "1." When TIE is set to "1" at this
time, an interrupt request to the CPU is generated.
A continuous operation is performed by writing the next transmission data to the SODR register
during the transmitting operation when the TDRE bit is "1" (the SODR register is vacant). By
writing data to the SODR register, the TDRE bit is cleared. After 8-bit data is transmitted, the
data written to the SODR register is loaded to the shifter and the transmitting operation is
performed continuously. By writing "0" to the TXE bit, the transmitting operation is stopped. If
"0" is written to the TXE bit during the transmitting operation, the transmitting operation is
stopped after 8-bit data is transmitted when the SODR register is vacant (when the TDRE bit is
"1"). When there is data in the SODR register (when the TDRE bit is "0"), the transmitting
operation is stopped after the data in the SODR register is transmitted. When 8-bit data
transmission is completed, the RDRF bit is set to "1." When RIE is "1" at this time, an interrupt
request to the CPU is generated.
SI
D0
D1
D2
D3
D4
D5
D6
D7
SCK
RDRF
Write to
SODR
Interrupt to CPU
TDRE
Interrupt to CPU