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參數(shù)資料
| 型號(hào)： | TE28F800C3TD70 |
| 廠商： | INTEL CORP |
| 元件分類： | PROM |
| 英文描述： | 512K X 16 FLASH 3V PROM, 70 ns, PDSO48 |
| 封裝： | 12 X 20 MM, TSOP-48 |
| 文件頁(yè)數(shù)： | 66/72頁(yè) |
| 文件大小： | 1083K |
| 代理商： | TE28F800C3TD70 |
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Intel Advanced+ Boot Block Flash Memory (C3)
Datasheet
Intel Advanced+ Boot Block Flash Memory (C3)
May 2005
Order Number: 290645, Revision: 023
69
Table 36.
Protection Register Information
Offset1
P = 0x35
Length
Description
(Optional Flash Features and Commands)
Address
Hex
Code
Value
0x(P+E)
1
Number of Protection register fields in JEDEC ID space.
“00h,” indicates that 256 protection bytes are available
43:
--01
01
0x(P+F)
0x(P+10)
(0xP+11)
4
44:
45:
46:
--80
--00
--03
80h
00h
8 byte
0x(P+12)
Protection Field 1: Protection Description
This field describes user-available One Time Programmable (OTP)
Protection register bytes. Some are pre-programmed with device-
unique serial numbers. Others are user programmable. Bits 0–15
point to the Protection register Lock byte, the section’s first byte.
The following bytes are factory pre-programmed and user-
programmable.
bits 0–7 = Lock/bytes JEDEC-plane physical low address
bits 8–15 = Lock/bytes JEDEC -plane physical high address
bits 16–23 = “n” such that 2
n = factory pre-programmed bytes
bits 24–31 = “n” such that 2n = user programmable bytes
47:
--03
8 byte
0x(P+13)
Reserved for future use
48:
Notes:
1.
The variable P is a pointer which is defined at CFI offset 0x15.
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