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參數資料
| 型號： | TLV2556MPWREP |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | ADC |
| 英文描述： | 11-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20 |
| 封裝： | GREEN, PLASTIC, TSSOP-20 |
| 文件頁數： | 35/37頁 |
| 文件大?。?/td> | 705K |
| 代理商： | TLV2556MPWREP |
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OPERATING CHARACTERISTICS
www.ti.com ................................................................................................................................................... SLAS598A – NOVEMBER 2008 – REVISED JULY 2009
over recommended operating free-air temperature range, VREF+ = 5 V,
SCLK frequency = 15 MHz when VCC = 5 V, VREF+ = 2.5 V,
SCLK frequency = 10 MHz when VCC = 2.7 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYP(1)
MAX
UNIT
INL
Integral nonlinearity error(2)
–1
1
LSB
DNL
Differential nonlinearity error
–1
1
LSB
EO
Offset error(3)(4)
–2
2
mV
EG
Gain error(3)(4)
–3
3
mV
ET
Total unadjusted error(5)
±1.5
LSB
Address data input = 1011
2048
Self-test output code(6) (see Table 2)
Address data input = 1100
0
Address data input = 1101
4095
(1)
All typical values are at VCC = 5 V, TA = 25°C.
(2)
Linearity error is the maximum deviation from the best straight line through the A/D transfer characteristics.
(3)
Analog input voltages greater than the voltage applied to REF+ convert as all ones (111111111111), while input voltages less than the
voltage applied to REF– convert as all zeros (000000000000).
(4)
Gain error is the difference between the actual mid-step value and the nominal mid-step value in the transfer diagram at the specified
gain point after the offset error has been adjusted to zero. Offset error is the difference between the actual mid-step value and the
nominal mid-step value at the offset point.
(5)
Total unadjusted error comprises linearity, zero-scale, and full-scale errors.
(6)
Both the input address and the output codes are expressed in positive logic.
Copyright 2008–2009, Texas Instruments Incorporated
7
Product Folder Link(s): TLV2556-EP
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