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參數(shù)資料
| 型號(hào)： | W26L04 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 英文描述： | 256K×16bit CMOS Static RAM(256K×16位CMOS靜態(tài)RAM) |
| 中文描述： | 256K × 16位的CMOS靜態(tài)RAM（256K × 16位的CMOS靜態(tài)RAM）的 |
| 文件頁(yè)數(shù)： | 5/12頁(yè) |
| 文件大小： | 158K |
| 代理商： | W26L04 |
Preliminary W26L04
Publication Release Date: December 1999
- 5 -
Revision A1
AC Characteristics, continued
(V
SS
= 0V; T
A
(
°
C) = -20 to 85 for LE, -40 to 85 for LI)
Read Cycle
PARAMETER
SYM.
3.0V
2.5V
2.0V
UNIT
MIN.
MAX.
MIN.
MAX.
MIN.
MAX.
Read Cycle Time
T
RC
70
-
85
-
120
-
nS
Address Access Time
T
AA
-
70
-
85
-
120
nS
Chip Select Access Time
T
ACS
-
70
-
85
-
120
nS
Output Enable to Output Valid
T
AOE
T
BA
-
35
70
-
50
-
65
nS
UB, LB Access Time
-
85
-
120
nS
Chip Selection to Output in Low Z
T
CLZ
*
10
-
10
-
10
-
nS
Output Enable to Output in Low Z
T
OLZ
*
5
-
5
-
5
-
nS
Chip Deselection to Output in High Z T
CHZ
*
-
30
-
35
-
50
nS
Output Disable to Output in High Z
T
OHZ
*
-
30
-
35
-
50
nS
Output Hold from Address Change
T
OH
10
-
10
-
10
-
nS
These parameters are sampled but not 100% tested
Write Cycle
PARAMETER
SYM.
3.0V
2.5V
2.0V
UNIT
MIN.
MAX.
MIN.
MAX
.
MIN.
MAX.
Write Cycle Time
T
WC
70
-
85
-
120
-
nS
Chip Selection to End of Write
T
CW
60
-
75
-
100
-
nS
Address Valid to End of Write
T
AW
60
-
75
-
100
-
nS
UB, LB Select to End of Write
T
BW
60
-
75
-
100
-
nS
Address Setup Time
T
AS
0
-
0
-
0
-
nS
Write Pulse Width
T
WP
55
-
65
-
100
-
nS
Write Recovery Time CS, WE
T
WR
0
-
0
-
0
-
nS
Data Valid to End of Write
T
DW
40
-
50
-
60
-
nS
Data Hold from End of Write
T
DH
0
-
0
-
0
-
nS
Write to Output in High Z
T
WHZ
*
-
25
-
35
-
40
nS
Output Disable to Output in High Z
T
OHZ
*
-
25
-
35
-
40
nS
Output Active from End of Write
T
OW
5
-
8
-
10
-
nS
These parameters are sampled but not 100% tested
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