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參數(shù)資料
| 型號(hào)： | W312-02HT |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | XO, clock |
| 英文描述： | FTG for VIA K7 Series Chipset with Programmable Output Frequency |
| 中文描述： | 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封裝： | SSOP-48 |
| 文件頁數(shù)： | 8/21頁 |
| 文件大小： | 143K |
| 代理商： | W312-02HT |
W312-02
Document #: 38-07259 Rev. *B
Page 8 of 21
Byte 5: Control Register 5
Bit
Pin#
Name
Default
Description
Bit 7
9
Latched FS4 input
X
Latched FS[4:0] inputs. These bits are read only.
Bit 6
7
Latched FS3 input
X
Bit 5
6
Latched FS2 input
X
Bit 4
47
Latched FS1 input
X
Bit 3
48
Latched FS0 input
X
Bit 2
–
Reserved
0
Reserved
Bit 1
–
Reserved
0
Reserved
Bit 0
–
SEL4
0
SW Frequency selection bits. See
Table 4
.
Byte 6: Reserved Register
Bit
Name
Default
Pin Description
Bit 7
Reserved
1
Reserved
Bit 6
Reserved
1
Reserved
Bit 5
Reserved
1
Reserved
Bit 4
Reserved
1
Reserved
Bit 3
Reserved
1
Reserved
Bit 2
Reserved
1
Reserved
Bit 1
Reserved
1
Reserved
Bit 0
Reserved
1
Reserved
Byte 7: Reserved Register
Bit
Name
Default
Pin Description
Bit 7
Reserved
1
Reserved
Bit 6
Reserved
1
Reserved
Bit 5
Reserved
1
Reserved
Bit 4
Reserved
1
Reserved
Bit 3
Reserved
1
Reserved
Bit 2
Reserved
1
Reserved
Bit 1
Reserved
1
Reserved
Bit 0
Reserved
1
Reserved
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