
The Western Design Center, Inc.
W65C02S Data Sheet
5
OPERATION TABLES
Table 5-1 Instruction Set Table
1.
ADC
ADd memory to accumulator with Carry
2.
AND
"AND" memory with accumulator
3.
ASL
Arithmetic Shift one bit Left, memory or
accumulator
4.
BBR
Branch on Bit Reset
5.
BBS
Branch of Bit Set
6.
BCC
Branch on Carry Clear (Pc=0)
7.
BCS
Branch on Carry Set (Pc=1)
8.
BEQ
Branch if EQual (Pz=1)
9.
BIT
BIt Test
10.
BMI
Branch if result MInus (Pn=1)
11.
BNE
Branch if Not Equal (Pz=0)
12.
BPL
Branch if result PLus (Pn=0)
13.
BRA
BRanch Always
14.
BRK
BReaK instruction
15.
BVC
Branch on oVerflow Clear (Pv=0)
16.
BVS
Branch on oVerflow Set (Pv=1)
17.
CLC
CLear Cary flag
18.
CLD
CLear Decimal mode
19.
CLI
CLear Interrupt disable bit
20.
CLV
CLear oVerflow flag
21.
CMP
CoMPare memory and accumulator
22.
CPX
ComPare memory and X register
23.
CPY
ComPare memory and Y register
24.
DEC
DECrement memory or accumulate by one
25.
DEX
DEcrement X by one
26.
DEY
DEcrement Y by one
27.
EOR
"Exclusive OR" memory with accumulate
28.
INC
INCrement memory or accumulate by one
29.
INX
INcrement X register by one
30.
INY
INcrement Y register by one
31.
JMP
JuMP to new location
32.
JSR
Jump to new location Saving Return (Jump to
SubRoutine)
33.
LDA
LoaD Accumulator with memory
34.
LDX
LoaD the X register with memory
35.
LDY
LoaD the Y register with memory
36.
LSR
Logical Shift one bit Right memory or accumulator
37.
NOP
No OPeration
38.
ORA
"OR" memory with Accumulator
39.
PHA
PusH Accumulator on stack
40.
PHP
PusH Processor status on stack
41.
PHX
PusH X register on stack
42.
PHY
PusH Y register on stack
43.
PLA
PuLl Accumulator from stack
44.
PLP
PuLl Processor status from stack
45.
PLX
PuLl X register from stack
46.
PLY
PuLl Y register from stack
47.
RMB
Reset Memory Bit
48.
ROL
ROtate one bit Left memory or accumulator
49.
ROR
ROtate one bit Right memory or accumulator
50.
RTI
ReTurn from Interrupt
51.
RTS
ReTurn from Subroutine
52.
SBC
SuBtract memory from accumulator with borrow
(Carry bit)
The Western Design Center, Inc. W65C02S Data Sheet
21
53.
54.
55.
56.
57.
58.
59.
60.
61.
62.
63.
64.
65.
66.
67.
68.
69.
Note:
=New Instruction
SED
SEI
SMB
STA
STP
STX
STY
STZ
TAX
TAY
TRB
TSB
TSX
TXA
TXS
TYA
WAI
SEt Decimal mode
SEt Interrupt disable status
Set Memory Bit
STore Accumulator in memory
SToP mode
STore the X register in memory
STore the Y register in memory
STore Zero in memory
Transfer the Accumulator to the X register
Transfer the Accumulator to the Y register
Test and Reset memory Bit
Test and Set memory Bit
Transfer the Stack pointer to the X register
Transfer the X register to the Accumulator
Transfer the X register to the Stack pointer register
Transfer Y register to the Accumulator
WAit for Interrupt