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參數資料
| 型號： | W65C02SQ-14 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Microprocessor |
| 中文描述： | 微處理器 |
| 文件頁數： | 36/40頁 |
| 文件大小： | 1011K |
| 代理商： | W65C02SQ-14 |
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The Western Design Center, Inc.
W65C02S Datasheet
The Western Design Center, Inc. W65C02S Datasheet 36
7
CAVEATS
Table 7-1 Microprocessor Operational Enhancements
Function
NMOS 6502
W65C02S
Indexed addressing across page
boundary
Extra read of invalid address.
Extra read of last instruction byte.
Execution of invalid OpCodes.
Some terminate only by reset.
Results are undefined.
All are NOP's (reserved for future use).
OpCode Bytes Cycles
02,22,42,62,82 2 2
C2, E2
X3,OB-BB,EB,FB 1
44
54,D4,F4
5C
DC,FC
1
3
4
8
4
2
2
3
3
Jump indirect, operand = XXFF.
Page address does not increment.
Page address increments, one additional
cycle.
Read/Modify/Write instruction at
effective address.
One read and two write cycles.
Two read and one write cycle.
Decimal flag.
Indeterminate after reset.
Initialized to binary mode (D=0) after reset
and interrupts.
Flags after decimal operation.
Invalid N, V and Z flags.
Valid flags. One additional cycle.
Interrupt after fetch of BRK
instruction
Interrupt vector is loaded; BRK
vector is ignored.
BRK is executed, and then interrupt is
executed.
Ready.
Input.
Bi-directional, WAI instruction pulls low.
Read/Modify/Write instructions
absolute indexed in same page.
Seven cycles.
Six cycles.
Oscillator.
Requires external active components.
Crystal or RC network will oscillate when
connected between PHI2 and PHI10.
Assertion of Ready (RDY) during
write operations.
Ignored.
Stops processor during PHI2, and WAI
instruction pulls RDY low.
Clock inputs.
PHI2 is the only required clock.
PHI2 is the only required clock.
Unused input-only pins.
Must be tied to VDD.
Must be tied to VDD.
The BRK instruction for both the NMOS 6502 and 65C02 is a 2 byte instruction. The NMOS and CMOS devices
simply skips the second byte (i.e. doesn’t care about the second byte) by incrementing the program counter twice.
It is important to realize that if a return from interrupt is used it will return to the location after the second or
signature byte.
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相關代理商/技術參數 |
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| W65C134S8PL-8 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| W65C134S8PLG-14 | 制造商:Western Design Center (WDC) 功能描述:8-bit Microcontrollers - MCU 8-bit Microcontroller |
| W65C134S8PLG-8 | 功能描述:8位微控制器 -MCU 8-bit Microcontroller RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
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| W65C134SPL-8 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
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